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xen/arm: vgic-v2: Correctly handle RAZ/WI registers
All the GICv2 registers are word-accessible. Some them are also
byte-accessible (see GICD_IPRIORITYR*).
Those registers are incorrectly implemented when they should be RAZ. Only
word-access size are currently allowed for them.
To avoid further issues, introduce different label following the access-size
of the registers:
- read_as_zero_32 and write_ignore_32: Used for registers accessible
via a word.
- read_as_zero: Used when we don't have to check the access size.
The latter is used when the access size has already been checked in the
register emulation and/or when the register offset is reserved/implementation
defined.
Note that, only used labels has been introduced.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
(cherry picked from commit 1fefa55027)
This commit is contained in:
1 parent
6498c5fbe2
commit
009d14dd3e
1 file changed
+13
-11
+13
-11
@@ -72,7 +72,7 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info)
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case GICD_IGROUPR ... GICD_IGROUPRN:
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/* We do not implement security extensions for guests, read zero */
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goto read_as_zero;
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goto read_as_zero_32;
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case GICD_ISENABLER ... GICD_ISENABLERN:
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if ( dabt.size != DABT_WORD ) goto bad_width;
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@@ -164,7 +164,7 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info)
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case GICD_NSACR ... GICD_NSACRN:
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/* We do not implement security extensions for guests, read zero */
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goto read_as_zero;
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goto read_as_zero_32;
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case GICD_SGIR:
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if ( dabt.size != DABT_WORD ) goto bad_width;
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@@ -224,8 +224,9 @@ bad_width:
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domain_crash_synchronous();
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return 0;
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read_as_zero:
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read_as_zero_32:
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if ( dabt.size != DABT_WORD ) goto bad_width;
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read_as_zero:
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*r = 0;
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return 1;
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}
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@@ -285,7 +286,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
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/* R/O -- write ignored */
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case GICD_TYPER:
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case GICD_IIDR:
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goto write_ignore;
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goto write_ignore_32;
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/* Implementation defined -- write ignored */
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case 0x020 ... 0x03c:
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@@ -293,7 +294,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
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case GICD_IGROUPR ... GICD_IGROUPRN:
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/* We do not implement security extensions for guests, write ignore */
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goto write_ignore;
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goto write_ignore_32;
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case GICD_ISENABLER ... GICD_ISENABLERN:
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if ( dabt.size != DABT_WORD ) goto bad_width;
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@@ -359,7 +360,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
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case GICD_ITARGETSR ... GICD_ITARGETSR + 7:
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/* SGI/PPI target is read only */
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goto write_ignore;
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goto write_ignore_32;
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case GICD_ITARGETSR + 8 ... GICD_ITARGETSRN:
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{
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@@ -432,10 +433,10 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
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return 1;
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case GICD_ICFGR: /* SGIs */
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goto write_ignore;
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goto write_ignore_32;
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case GICD_ICFGR + 1: /* PPIs */
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/* It is implementation defined if these are writeable. We chose not */
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goto write_ignore;
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goto write_ignore_32;
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case GICD_ICFGR + 2 ... GICD_ICFGRN: /* SPIs */
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if ( dabt.size != DABT_WORD ) goto bad_width;
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rank = vgic_rank_offset(v, 2, gicd_reg - GICD_ICFGR, DABT_WORD);
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@@ -447,7 +448,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
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case GICD_NSACR ... GICD_NSACRN:
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/* We do not implement security extensions for guests, write ignore */
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goto write_ignore;
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goto write_ignore_32;
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case GICD_SGIR:
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if ( dabt.size != DABT_WORD ) goto bad_width;
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@@ -473,7 +474,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
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/* R/O -- write ignore */
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case GICD_ICPIDR2:
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goto write_ignore;
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goto write_ignore_32;
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/* Implementation defined -- write ignored */
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case 0xfec ... 0xffc:
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@@ -502,8 +503,9 @@ bad_width:
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domain_crash_synchronous();
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return 0;
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write_ignore:
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write_ignore_32:
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if ( dabt.size != DABT_WORD ) goto bad_width;
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write_ignore:
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return 1;
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}
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