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x86: avoid needless EPT table ajustment and cache flush
When a guest change it's MTRR MSRs, ajusting EPT table and flushing cache are needed only when guest has IOMMU device, using need_iommu(d) can minimize the impact to guest with device assigned, since a guest may be hot plugged with a device thus there may be dirty cache lines before need_iommu(d) becoming true, force the p2m_memory_type_changed and flush_all when the first device is assigned to guest to amend this issue. Signed-off-by: Liang Li <liang.z.li@intel.com> Signed-off-by: Yang Zhang <yang.z.zhang@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
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@@ -789,7 +789,7 @@ HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save_mtrr_msr, hvm_load_mtrr_msr,
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void memory_type_changed(struct domain *d)
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{
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if ( iommu_enabled && d->vcpu && d->vcpu[0] )
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if ( need_iommu(d) && d->vcpu && d->vcpu[0] )
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{
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p2m_memory_type_changed(d);
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flush_all(FLUSH_CACHE);
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@@ -1365,6 +1365,13 @@ static int assign_device(struct domain *d, u16 seg, u8 bus, u8 devfn)
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}
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}
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d->need_iommu = 1;
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/*
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* There may be dirty cache lines when a device is assigned
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* and before need_iommu(d) becoming true, this will cause
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* memory_type_changed lose effect if memory type changes.
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* Call memory_type_changed here to amend this.
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*/
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memory_type_changed(d);
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}
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pdev = pci_get_pdev_by_domain(hardware_domain, seg, bus, devfn);
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