x86: avoid needless EPT table ajustment and cache flush

When a guest change it's MTRR MSRs, ajusting EPT table and flushing
cache are needed only when guest has IOMMU device, using need_iommu(d)
can minimize the impact to guest with device assigned, since a guest
may be hot plugged with a device thus there may be dirty cache lines
before need_iommu(d) becoming true, force the p2m_memory_type_changed
and flush_all when the first device is assigned to guest to amend this
issue.

Signed-off-by: Liang Li <liang.z.li@intel.com>
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
Liang Li authored and Jan Beulich committed 2015-02-05 13:59:48 +01:00
1 parent e8bb583bec
commit 06ed8cc2cc
2 files changed
+8 -1

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+1 -1
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@@ -789,7 +789,7 @@ HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save_mtrr_msr, hvm_load_mtrr_msr,
void memory_type_changed(struct domain *d)
{
if ( iommu_enabled && d->vcpu && d->vcpu[0] )
if ( need_iommu(d) && d->vcpu && d->vcpu[0] )
{
p2m_memory_type_changed(d);
flush_all(FLUSH_CACHE);
+7
View File
@@ -1365,6 +1365,13 @@ static int assign_device(struct domain *d, u16 seg, u8 bus, u8 devfn)
}
}
d->need_iommu = 1;
/*
* There may be dirty cache lines when a device is assigned
* and before need_iommu(d) becoming true, this will cause
* memory_type_changed lose effect if memory type changes.
* Call memory_type_changed here to amend this.
*/
memory_type_changed(d);
}
pdev = pci_get_pdev_by_domain(hardware_domain, seg, bus, devfn);
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