[IA64] Fix vm_summary info in VTi domain

This patch fixed vm_summary info and provide correct max_itr_entry,
max_dtr_entry,impl_va_msb, rid_size and so on. 

Signed-off-by: Zhang xiantao <xiantao.zhang@intel.com>
This commit is contained in:
awilliam@xenbuild.aw committed 2006-04-26 12:40:56 -06:00
1 parent 390a5e26ef
commit 0dc5928a6e
2 files changed
+16 -2

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+15 -2
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@@ -21,6 +21,8 @@
#include <asm/vmx_vcpu.h>
#include <asm/pal.h>
#include <asm/sal.h>
#include <asm/tlb.h>
#include <asm/vmx_mm_def.h>
static void
get_pal_parameters (VCPU *vcpu, UINT64 *gr29,
@@ -285,9 +287,20 @@ pal_test_info(VCPU *vcpu){
static struct ia64_pal_retval
pal_vm_summary(VCPU *vcpu){
pal_vm_info_1_u_t vminfo1;
pal_vm_info_2_u_t vminfo2;
struct ia64_pal_retval result;
result.status= -1; //unimplemented
PAL_CALL(result,PAL_VM_SUMMARY,0,0,0);
if(!result.status){
vminfo1.pvi1_val = result.v0;
vminfo1.pal_vm_info_1_s.max_itr_entry = NITRS -1;
vminfo1.pal_vm_info_1_s.max_dtr_entry = NDTRS -1;
result.v0 = vminfo1.pvi1_val;
vminfo2.pal_vm_info_2_s.impl_va_msb = GUEST_IMPL_VA_MSB;
vminfo2.pal_vm_info_2_s.rid_size = current->domain->arch.rid_bits;
result.v1 = vminfo2.pvi2_val;
}
return result;
}
+1
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@@ -28,6 +28,7 @@
#define ARCH_PAGE_SHIFT 12
#define ARCH_PAGE_SIZE PSIZE(ARCH_PAGE_SHIFT)
#define MAX_PHYS_ADDR_BITS 50
#define GUEST_IMPL_VA_MSB 59
#define PMASK(size) (~((size) - 1))
#define PSIZE(size) (1UL<<(size))
//#define PAGE_SIZE_4K PSIZE(12)
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