x86/mwait-idle: Add Meteorlake support

Add intel_idle support for MeteorLake.

C1 and C1E states on Meteorlake are mutually exclusive, like Alderlake
and Raptorlake, but they have little latency difference with measureable
power difference, so always enable "C1E promotion" bit and expose C1E
only.

Expose C6 because it has less power compared with C1E, and smaller
latency compared with C8/C10.

Ignore C8 and expose C10, because C8 does not show latency advantage
compared with C10.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git eeae55ed9c0a
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
master commit: 433ed7d4f8
master date: 2025-07-09 11:01:03 +0200
This commit is contained in:
Zhang Rui authored and Jan Beulich committed 2025-07-22 09:57:30 +02:00
1 parent 371502857f
commit 0dc8006316
1 file changed
+27
+27
View File
@@ -678,6 +678,28 @@ static struct cpuidle_state __read_mostly adl_l_cstates[] = {
{}
};
static const struct cpuidle_state mtl_l_cstates[] = {
{
.name = "C1E",
.flags = MWAIT2flg(0x01),
.exit_latency = 1,
.target_residency = 1,
},
{
.name = "C6",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 140,
.target_residency = 420,
},
{
.name = "C10",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 310,
.target_residency = 930,
},
{}
};
static const struct cpuidle_state gmt_cstates[] = {
{
.name = "C1",
@@ -1133,6 +1155,10 @@ static struct idle_cpu __read_mostly idle_cpu_adl_l = {
.state_table = adl_l_cstates,
};
static const struct idle_cpu idle_cpu_mtl_l = {
.state_table = mtl_l_cstates,
};
static const struct idle_cpu idle_cpu_gmt = {
.state_table = gmt_cstates,
};
@@ -1206,6 +1232,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconstrel = {
ICPU(ICELAKE_D, icx),
ICPU(ALDERLAKE, adl),
ICPU(ALDERLAKE_L, adl_l),
ICPU(METEORLAKE_L, mtl_l),
ICPU(ATOM_GRACEMONT, gmt),
ICPU(SAPPHIRERAPIDS_X, spr),
ICPU(EMERALDRAPIDS_X, spr),
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