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[XEN] Emulate BSF/BSR. Fix ARPL emulation.
Fix building POPA emulation on x86/32. Fix asm constraints for in-memory operands. Signed-off-by: Keir Fraser <keir@xensource.com>
This commit is contained in:
kaf24@localhost.localdomain committed
1 parent
f06bcbb8cc
commit
0ea0df3d71
1 file changed
+41
-12
+41
-12
@@ -219,7 +219,8 @@ static uint8_t twobyte_table[256] = {
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0, 0, ByteOp|DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem16|ModRM|Mov,
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/* 0xB8 - 0xBF */
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0, 0, DstBitBase|SrcImmByte|ModRM, DstBitBase|SrcReg|ModRM,
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0, 0, ByteOp|DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem16|ModRM|Mov,
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DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM,
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ByteOp|DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem16|ModRM|Mov,
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/* 0xC0 - 0xC7 */
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ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM, 0, 0,
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0, 0, 0, ImplicitOps|ModRM,
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@@ -322,7 +323,8 @@ do{ unsigned long _tmp; \
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_op"w %"_wx"3,%1; " \
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_POST_EFLAGS("0","4","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: _wy ((_src).val), "i" (EFLAGS_MASK) ); \
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: _wy ((_src).val), "i" (EFLAGS_MASK), \
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"m" (_eflags), "m" ((_dst).val) ); \
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break; \
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case 4: \
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__asm__ __volatile__ ( \
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@@ -330,7 +332,8 @@ do{ unsigned long _tmp; \
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_op"l %"_lx"3,%1; " \
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_POST_EFLAGS("0","4","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: _ly ((_src).val), "i" (EFLAGS_MASK) ); \
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: _ly ((_src).val), "i" (EFLAGS_MASK), \
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"m" (_eflags), "m" ((_dst).val) ); \
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break; \
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case 8: \
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__emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy); \
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@@ -347,7 +350,8 @@ do{ unsigned long _tmp; \
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_op"b %"_bx"3,%1; " \
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_POST_EFLAGS("0","4","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: _by ((_src).val), "i" (EFLAGS_MASK) ); \
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: _by ((_src).val), "i" (EFLAGS_MASK), \
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"m" (_eflags), "m" ((_dst).val) ); \
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break; \
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default: \
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__emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy);\
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@@ -378,7 +382,7 @@ do{ unsigned long _tmp; \
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_op"b %1; " \
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_POST_EFLAGS("0","3","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: "i" (EFLAGS_MASK) ); \
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: "i" (EFLAGS_MASK), "m" (_eflags), "m" ((_dst).val) ); \
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break; \
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case 2: \
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__asm__ __volatile__ ( \
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@@ -386,7 +390,7 @@ do{ unsigned long _tmp; \
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_op"w %1; " \
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_POST_EFLAGS("0","3","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: "i" (EFLAGS_MASK) ); \
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: "i" (EFLAGS_MASK), "m" (_eflags), "m" ((_dst).val) ); \
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break; \
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case 4: \
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__asm__ __volatile__ ( \
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@@ -394,7 +398,7 @@ do{ unsigned long _tmp; \
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_op"l %1; " \
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_POST_EFLAGS("0","3","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: "i" (EFLAGS_MASK) ); \
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: "i" (EFLAGS_MASK), "m" (_eflags), "m" ((_dst).val) ); \
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break; \
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case 8: \
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__emulate_1op_8byte(_op, _dst, _eflags); \
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@@ -410,7 +414,8 @@ do{ __asm__ __volatile__ ( \
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_op"q %"_qx"3,%1; " \
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_POST_EFLAGS("0","4","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: _qy ((_src).val), "i" (EFLAGS_MASK) ); \
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: _qy ((_src).val), "i" (EFLAGS_MASK), \
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"m" (_eflags), "m" ((_dst).val) ); \
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} while (0)
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#define __emulate_1op_8byte(_op, _dst, _eflags) \
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do{ __asm__ __volatile__ ( \
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@@ -418,7 +423,7 @@ do{ __asm__ __volatile__ ( \
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_op"q %1; " \
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_POST_EFLAGS("0","3","2") \
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: "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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: "i" (EFLAGS_MASK) ); \
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: "i" (EFLAGS_MASK), "m" (_eflags), "m" ((_dst).val) ); \
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} while (0)
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#elif defined(__i386__)
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#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)
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@@ -1097,7 +1102,9 @@ x86_emulate(
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/* arpl */
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uint16_t src_val = dst.val;
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dst = src;
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if ( (src_val & 3) > (dst.val & 3) )
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_regs.eflags &= ~EFLG_ZF;
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_regs.eflags |= ((src_val & 3) > (dst.val & 3)) ? EFLG_ZF : 0;
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if ( _regs.eflags & EFLG_ZF )
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dst.val = (dst.val & ~3) | (src_val & 3);
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else
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dst.type = OP_NONE;
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@@ -1661,8 +1668,10 @@ x86_emulate(
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case 0x61: /* popa */ {
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int i;
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unsigned long dummy_esp, *regs[] = {
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&_regs.edi, &_regs.esi, &_regs.ebp, &dummy_esp,
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&_regs.ebx, &_regs.edx, &_regs.ecx, &_regs.eax };
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(unsigned long *)&_regs.edi, (unsigned long *)&_regs.esi,
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(unsigned long *)&_regs.ebp, (unsigned long *)&dummy_esp,
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(unsigned long *)&_regs.ebx, (unsigned long *)&_regs.edx,
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(unsigned long *)&_regs.ecx, (unsigned long *)&_regs.eax };
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generate_exception_if(mode_64bit(), EXC_UD);
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for ( i = 0; i < 8; i++ )
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if ( (rc = ops->read(x86_seg_ss,
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@@ -2008,6 +2017,26 @@ x86_emulate(
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dst.val = (uint8_t)src.val;
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break;
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case 0xbc: /* bsf */ {
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int zf;
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asm ( "bsf %2,%0; setc %b1"
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: "=r" (dst.val), "=q" (zf)
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: "r" (src.val), "1" (0) );
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_regs.eflags &= ~EFLG_ZF;
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_regs.eflags |= zf ? EFLG_ZF : 0;
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break;
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}
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case 0xbd: /* bsr */ {
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int zf;
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asm ( "bsr %2,%0; setc %b1"
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: "=r" (dst.val), "=q" (zf)
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: "r" (src.val), "1" (0) );
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_regs.eflags &= ~EFLG_ZF;
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_regs.eflags |= zf ? EFLG_ZF : 0;
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break;
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}
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case 0xb7: /* movzx rm16,r{16,32,64} */
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dst.val = (uint16_t)src.val;
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break;
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