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x86/idle: Fix buggy "x86/mwait-idle: enable interrupts before C1 on Xeons"
The check of this_softirq_pending must be performed with irqs disabled, but this property was broken by an attempt to optimise entry/exit latency. Commit c227233ad64c in Linux (which we copied into Xen) was fixed up by edc8fc01f608 in Linux, which we have so far missed. Going to sleep without waking on interrupts is nonsensical outside of play_dead(), so overload this to select between two possible MWAITs, the second using the STI shadow to cover MWAIT for exactly the same reason as we do in safe_halt(). Fixes:b17e0ec72e("x86/mwait-idle: enable interrupts before C1 on Xeons") Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> (cherry picked from commit9b0f0f6e23)
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@@ -79,6 +79,13 @@ static always_inline void mwait(unsigned int eax, unsigned int ecx)
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:: "a" (eax), "c" (ecx) );
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}
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static always_inline void sti_mwait_cli(unsigned int eax, unsigned int ecx)
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{
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/* STI shadow covers MWAIT. */
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asm volatile ( "sti; mwait; cli"
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:: "a" (eax), "c" (ecx) );
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}
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#define GET_HW_RES_IN_NS(msr, val) \
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do { rdmsrl(msr, val); val = tsc_ticks2ns(val); } while( 0 )
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#define GET_MC6_RES(val) GET_HW_RES_IN_NS(0x664, val)
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@@ -473,12 +480,19 @@ void mwait_idle_with_hints(unsigned int eax, unsigned int ecx)
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monitor(this_softirq_pending, 0, 0);
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ASSERT(!local_irq_is_enabled());
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if ( !*this_softirq_pending )
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{
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struct cpu_info *info = get_cpu_info();
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spec_ctrl_enter_idle(info);
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mwait(eax, ecx);
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if ( ecx & MWAIT_ECX_INTERRUPT_BREAK )
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mwait(eax, ecx);
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else
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sti_mwait_cli(eax, ecx);
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spec_ctrl_exit_idle(info);
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}
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@@ -973,12 +973,8 @@ static void cf_check mwait_idle(void)
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update_last_cx_stat(power, cx, before);
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if (cx->irq_enable_early)
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local_irq_enable();
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mwait_idle_with_hints(cx->address, MWAIT_ECX_INTERRUPT_BREAK);
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local_irq_disable();
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mwait_idle_with_hints(cx->address,
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cx->irq_enable_early ? 0 : MWAIT_ECX_INTERRUPT_BREAK);
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after = alternative_call(cpuidle_get_tick);
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