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Add definitions for machine check MSRs introduced in AMD Family 0x10 (Barcelona).
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
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Keir Fraser committed
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@@ -166,13 +166,18 @@
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#define MSR_K7_FID_VID_CTL 0xc0010041
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#define MSR_K7_FID_VID_STATUS 0xc0010042
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#define MSR_K8_ENABLE_C1E 0xc0010055
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#define MSR_K8_VM_CR 0xC0010114
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#define MSR_K8_VM_HSAVE_PA 0xC0010117
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#define MSR_K8_VM_CR 0xc0010114
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#define MSR_K8_VM_HSAVE_PA 0xc0010117
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/* MSR_K8_VM_CR bits: */
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#define _K8_VMCR_SVME_DISABLE 4
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#define K8_VMCR_SVME_DISABLE (1 << _K8_VMCR_SVME_DISABLE)
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/* AMD Family10h machine check MSRs */
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#define MSR_F10_MC4_MISC1 0xc0000408
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#define MSR_F10_MC4_MISC2 0xc0000409
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#define MSR_F10_MC4_MISC3 0xc000040A
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/* K6 MSRs */
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#define MSR_K6_EFER 0xc0000080
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#define MSR_K6_STAR 0xc0000081
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