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[HVM][DM] Cleaner way of clearing VGA memory on mode changes (thanks to
Fabrice Bellard on the QEMU project). This patch clears the memory in the BIOS call rather than when the Cirrus Logic register changes, which more closely matches what happens on the real hardware. Signed-off-by: Don Dugger <donald.d.dugger@intel.com>
This commit is contained in:
kaf24@firebug.cl.cam.ac.uk committed
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@@ -525,6 +525,13 @@ cirrus_debug_dump:
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cirrus_set_video_mode_extended:
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call cirrus_switch_mode
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pop ax ;; mode
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test al, #0x80
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jnz cirrus_set_video_mode_extended_1
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push ax
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mov ax, #0xffff ; set to 0xff to keep win 2K happy
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call cirrus_clear_vram
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pop ax
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cirrus_set_video_mode_extended_1:
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and al, #0x7f
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push ds
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@@ -992,6 +999,13 @@ cirrus_vesa_02h_1:
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jnz cirrus_vesa_02h_3
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call cirrus_enable_16k_granularity
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cirrus_vesa_02h_3:
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test bx, #0x8000 ;; no clear
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jnz cirrus_vesa_02h_4
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push ax
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xor ax,ax
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call cirrus_clear_vram
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pop ax
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cirrus_vesa_02h_4:
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pop ax
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push ds
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#ifdef CIRRUS_VESA3_PMINFO
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@@ -1460,6 +1474,38 @@ cirrus_get_start_addr:
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pop bx
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ret
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cirrus_clear_vram:
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pusha
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push es
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mov si, ax
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call cirrus_enable_16k_granularity
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call cirrus_extbios_85h
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shl al, #2
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mov bl, al
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xor ah,ah
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cirrus_clear_vram_1:
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mov al, #0x09
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mov dx, #0x3ce
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out dx, ax
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push ax
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mov cx, #0xa000
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mov es, cx
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xor di, di
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mov ax, si
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mov cx, #8192
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cld
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rep
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stosw
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pop ax
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inc ah
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cmp ah, bl
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jne cirrus_clear_vram_1
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pop es
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popa
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ret
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cirrus_extbios_handlers:
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;; 80h
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dw cirrus_extbios_80h
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@@ -1191,17 +1191,6 @@ cirrus_hook_write_sr(CirrusVGAState * s, unsigned reg_index, int reg_value)
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s->hw_cursor_y = (reg_value << 3) | (reg_index >> 5);
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break;
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case 0x07: // Extended Sequencer Mode
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/* Win2K seems to assume that the VRAM is set to 0xff
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* whenever VGA/SVGA mode changes
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*/
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if ((s->sr[0x07] ^ reg_value) & CIRRUS_SR7_BPP_SVGA)
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memset(s->vram_ptr, 0xff, s->real_vram_size);
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s->sr[0x07] = reg_value;
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#ifdef DEBUG_CIRRUS
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printf("cirrus: handled outport sr_index %02x, sr_value %02x\n",
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reg_index, reg_value);
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#endif
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break;
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case 0x08: // EEPROM Control
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case 0x09: // Scratch Register 0
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case 0x0a: // Scratch Register 1
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