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AMD/IOMMU: drop remaining guest-IOMMU bits too
With a02174c6c8 ("amd/iommu: clean up unused guest iommu related
functions") having removed the sole place where d->g_iommu would be set
to non-NULL, guest_iommu_add_ppr_log() will unconditionally bail the
latest from its 2nd if(). With it dropped, all other stuff in the file
is unused, too. Delete iommu_guest.c altogether.
Further delete struct guest{_buffer,_dev_table,_iommu{,_msi}} as well as
struct mmio_reg for being unused with the unused g_iommu also dropped
from struct arch_iommu.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
This commit is contained in:
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cc950c49ae
commit
10e8d824b7
5 files changed
+1
-181
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@@ -52,7 +52,6 @@ struct arch_iommu
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struct {
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unsigned int paging_mode;
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struct page_info *root_table;
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struct guest_iommu *g_iommu;
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} amd;
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};
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};
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@@ -5,4 +5,3 @@ obj-y += pci_amd_iommu.o
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obj-bin-y += iommu_acpi.init.o
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obj-y += iommu_intr.o
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obj-y += iommu_cmd.o
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obj-$(CONFIG_HVM) += iommu_guest.o
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@@ -145,57 +145,6 @@ int iterate_ivrs_entries(int (*handler)(const struct amd_iommu *iommu,
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struct ivrs_mappings *map,
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uint16_t bdf));
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/* iommu tables in guest space */
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struct mmio_reg {
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uint32_t lo;
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uint32_t hi;
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};
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struct guest_dev_table {
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struct mmio_reg reg_base;
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uint32_t size;
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};
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struct guest_buffer {
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struct mmio_reg reg_base;
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struct mmio_reg reg_tail;
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struct mmio_reg reg_head;
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uint32_t size;
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};
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struct guest_iommu_msi {
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uint8_t vector;
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uint8_t dest;
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uint8_t dest_mode;
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uint8_t delivery_mode;
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uint8_t trig_mode;
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};
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/* virtual IOMMU structure */
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struct guest_iommu {
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struct domain *domain;
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spinlock_t lock;
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bool enabled;
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struct guest_dev_table dev_table;
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struct guest_buffer cmd_buffer;
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struct guest_buffer event_log;
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struct guest_buffer ppr_log;
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struct tasklet cmd_buffer_tasklet;
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uint64_t mmio_base; /* MMIO base address */
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/* MMIO regs */
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union amd_iommu_control reg_ctrl; /* MMIO offset 0018h */
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struct mmio_reg reg_status; /* MMIO offset 2020h */
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union amd_iommu_ext_features reg_ext_feature; /* MMIO offset 0030h */
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/* guest interrupt settings */
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struct guest_iommu_msi msi;
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};
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extern bool iommuv2_enabled;
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struct acpi_ivrs_hardware;
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@@ -344,13 +293,6 @@ void cf_check amd_iommu_resume(void);
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int __must_check cf_check amd_iommu_suspend(void);
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void cf_check amd_iommu_crash_shutdown(void);
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/* guest iommu support */
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#ifdef CONFIG_HVM
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void guest_iommu_add_ppr_log(struct domain *d, uint32_t entry[]);
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#else
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static inline void guest_iommu_add_ppr_log(struct domain *d, uint32_t entry[]) {}
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#endif
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static inline u32 get_field_from_reg_u32(u32 reg_value, u32 mask, u32 shift)
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{
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u32 field;
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@@ -1,120 +0,0 @@
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/*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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* Author: Wei Wang <wei.wang2@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <asm/p2m.h>
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#include "iommu.h"
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#define reg_to_u64(reg) (((uint64_t)reg.hi << 32) | reg.lo )
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static uint16_t get_guest_bdf(struct domain *d, uint16_t machine_bdf)
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{
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return machine_bdf;
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}
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static inline struct guest_iommu *domain_iommu(struct domain *d)
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{
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return dom_iommu(d)->arch.amd.g_iommu;
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}
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static unsigned long get_gfn_from_base_reg(uint64_t base_raw)
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{
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base_raw &= PADDR_MASK;
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ASSERT ( base_raw != 0 );
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return base_raw >> PAGE_SHIFT;
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}
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static void guest_iommu_deliver_msi(struct domain *d)
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{
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uint8_t vector, dest, dest_mode, delivery_mode, trig_mode;
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struct guest_iommu *iommu = domain_iommu(d);
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vector = iommu->msi.vector;
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dest = iommu->msi.dest;
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dest_mode = iommu->msi.dest_mode;
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delivery_mode = iommu->msi.delivery_mode;
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trig_mode = iommu->msi.trig_mode;
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vmsi_deliver(d, vector, dest, dest_mode, delivery_mode, trig_mode);
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}
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static unsigned long guest_iommu_get_table_mfn(struct domain *d,
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uint64_t base_raw,
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unsigned int pos)
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{
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unsigned long idx, gfn, mfn;
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p2m_type_t p2mt;
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gfn = get_gfn_from_base_reg(base_raw);
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idx = pos >> PAGE_SHIFT;
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mfn = mfn_x(get_gfn(d, gfn + idx, &p2mt));
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put_gfn(d, gfn);
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return mfn;
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}
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void guest_iommu_add_ppr_log(struct domain *d, u32 entry[])
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{
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uint16_t gdev_id;
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unsigned long mfn, tail, head;
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ppr_entry_t *log;
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struct guest_iommu *iommu;
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if ( !is_hvm_domain(d) )
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return;
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iommu = domain_iommu(d);
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if ( !iommu )
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return;
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tail = iommu->ppr_log.reg_tail.lo;
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head = iommu->ppr_log.reg_head.lo;
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if ( tail >= iommu->ppr_log.size || head >= iommu->ppr_log.size )
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{
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AMD_IOMMU_DEBUG("Error: guest iommu ppr log overflows\n");
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iommu->enabled = 0;
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return;
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}
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mfn = guest_iommu_get_table_mfn(d, reg_to_u64(iommu->ppr_log.reg_base),
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tail);
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ASSERT(mfn_valid(_mfn(mfn)));
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log = map_domain_page(_mfn(mfn)) + (tail & ~PAGE_MASK);
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/* Convert physical device id back into virtual device id */
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gdev_id = get_guest_bdf(d, iommu_get_devid_from_cmd(entry[0]));
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iommu_set_devid_to_cmd(&entry[0], gdev_id);
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memcpy(log, entry, sizeof(ppr_entry_t));
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/* Now shift ppr log tail pointer */
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tail += sizeof(ppr_entry_t);
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if ( tail >= iommu->ppr_log.size )
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{
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tail = 0;
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iommu->reg_status.lo |= IOMMU_STATUS_PPR_LOG_OVERFLOW;
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}
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iommu->ppr_log.reg_tail.lo = tail;
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unmap_domain_page(log);
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guest_iommu_deliver_msi(d);
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}
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@@ -646,7 +646,7 @@ static void cf_check parse_ppr_log_entry(struct amd_iommu *iommu, u32 entry[])
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pcidevs_unlock();
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if ( pdev )
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guest_iommu_add_ppr_log(pdev->domain, entry);
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/* guest_iommu_add_ppr_log(pdev->domain, entry) */;
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}
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static void iommu_check_ppr_log(struct amd_iommu *iommu)
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