xen/arm: Isolate the SError between the context switch of 2 vCPUs

If there is a pending SError while we are doing context switch, if the
SError handle option is "FORWARD", We have to guarantee this SError to
be caught by current vCPU, otherwise it will be caught by next vCPU and
be forwarded to this wrong vCPU.

So we have to synchronize SError before switch to next vCPU. But this is
only required by "FORWARD" option. In this case we added a new flag
SKIP_CTXT_SWITCH_SERROR_SYNC in cpu_hwcaps to skip synchronizing SError
in context switch for other options. In the meantime, we don't need to
export serror_op accessing to other source files.

Because we have umasked the Abort/SError bit in previous patch, we have
to disable Abort/SError before doing context switch as we have done for
IRQ.

Signed-off-by: Wei Chen <Wei.Chen@arm.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
This commit is contained in:
Wei Chen authored and Stefano Stabellini committed 2017-04-05 12:14:56 -07:00
1 parent 297e74abca
commit 126751d1e9
3 files changed
+17 -1

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+12
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@@ -29,6 +29,7 @@
#include <asm/cpufeature.h>
#include <asm/vfp.h>
#include <asm/procinfo.h>
#include <asm/alternative.h>
#include <asm/gic.h>
#include <asm/vgic.h>
@@ -312,6 +313,17 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
local_irq_disable();
/*
* If the serrors_op is "FORWARD", we have to prevent forwarding
* SError to wrong vCPU. So before context switch, we have to use
* the SYNCRONIZE_SERROR to guarantee that the pending SError would
* be caught by current vCPU.
*
* The SKIP_CTXT_SWITCH_SERROR_SYNC will be set to cpu_hwcaps when the
* serrors_op is NOT "FORWARD".
*/
SYNCHRONIZE_SERROR(SKIP_CTXT_SWITCH_SERROR_SYNC);
set_current(next);
prev = __context_switch(prev, next);
+3
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@@ -167,6 +167,9 @@ static int __init update_serrors_cpu_caps(void)
if ( serrors_op != SERRORS_DIVERSE )
cpus_set_cap(SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT);
if ( serrors_op != SERRORS_FORWARD )
cpus_set_cap(SKIP_CTXT_SWITCH_SERROR_SYNC);
return 0;
}
__initcall(update_serrors_cpu_caps);
+2 -1
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@@ -41,8 +41,9 @@
#define ARM64_WORKAROUND_834220 3
#define LIVEPATCH_FEATURE 4
#define SKIP_SYNCHRONIZE_SERROR_ENTRY_EXIT 5
#define SKIP_CTXT_SWITCH_SERROR_SYNC 6
#define ARM_NCAPS 6
#define ARM_NCAPS 7
#ifndef __ASSEMBLY__
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