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arm/mpu: Enable read/write to protection regions for arm32
Define prepare_selector(), read_protection_region() and
write_protection_region() for arm32. Also, define
GENERATE_{READ/WRITE}_PR_REG_OTHERS to access MPU regions from 32 to 254.
Enable pr_{get/set}_{base/limit}(), region_is_valid() for arm32.
Enable pr_of_addr() for arm32.
The maximum number of regions supported is 255 (which corresponds to the
maximum value in HMPUIR).
Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@amd.com>
Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
Reviewed-by: Hari Limaye <hari.limaye@arm.com>
Tested-by: Hari Limaye <hari.limaye@arm.com>
Acked-by: Julien Grall <jgrall@amazon.com>
This commit is contained in:
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@@ -25,7 +25,6 @@
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_ARM_64
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/*
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* Set base address of MPU protection region.
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*
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@@ -85,7 +84,6 @@ static inline bool region_is_valid(const pr_t *pr)
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{
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return pr->prlar.reg.en;
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}
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#endif /* CONFIG_ARM_64 */
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#endif /* __ASSEMBLY__ */
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@@ -1,3 +1,4 @@
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obj-$(CONFIG_ARM_32) += arm32/
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obj-$(CONFIG_ARM_64) += arm64/
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obj-$(CONFIG_ARM_32) += domain-page.o
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obj-y += mm.o
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@@ -0,0 +1 @@
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obj-y += mm.o
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@@ -0,0 +1,164 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <xen/bug.h>
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#include <xen/types.h>
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#include <asm/mpu.h>
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#include <asm/sysregs.h>
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#include <asm/system.h>
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#define GENERATE_WRITE_PR_REG_CASE(num, pr) \
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case num: \
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{ \
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WRITE_SYSREG(pr->prbar.bits, HPRBAR##num); \
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WRITE_SYSREG(pr->prlar.bits, HPRLAR##num); \
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break; \
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}
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#define GENERATE_WRITE_PR_REG_OTHERS(num, pr) \
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case num: \
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{ \
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WRITE_SYSREG(pr->prbar.bits, HPRBAR); \
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WRITE_SYSREG(pr->prlar.bits, HPRLAR); \
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break; \
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}
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#define GENERATE_READ_PR_REG_CASE(num, pr) \
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case num: \
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{ \
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pr->prbar.bits = READ_SYSREG(HPRBAR##num); \
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pr->prlar.bits = READ_SYSREG(HPRLAR##num); \
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break; \
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}
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#define GENERATE_READ_PR_REG_OTHERS(num, pr) \
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case num: \
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{ \
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pr->prbar.bits = READ_SYSREG(HPRBAR); \
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pr->prlar.bits = READ_SYSREG(HPRLAR); \
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break; \
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}
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/*
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* Armv8-R supports direct access and indirect access to the MPU regions through
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* registers:
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* - indirect access involves changing the MPU region selector, issuing an isb
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* barrier and accessing the selected region through specific registers
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* - direct access involves accessing specific registers that point to
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* specific MPU regions, without changing the selector, avoiding the use of
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* a barrier.
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* For Arm32 the HPR{B,L}AR<n> (for n=0..31) are used for direct access to the
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* first 32 MPU regions.
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* For MPU regions numbered 32..254, one needs to set the region number in
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* HPRSELR, followed by configuring HPR{B,L}AR.
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*/
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static void prepare_selector(uint8_t *sel)
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{
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uint8_t cur_sel = *sel;
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/* The top 24 bits of HPRSELR are RES0. */
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uint8_t val = READ_SYSREG(HPRSELR) & 0xff;
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if ( (cur_sel > 31) && (cur_sel != val) )
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{
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WRITE_SYSREG(cur_sel, HPRSELR);
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isb();
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}
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}
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void read_protection_region(pr_t *pr_read, uint8_t sel)
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{
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prepare_selector(&sel);
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switch ( sel )
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{
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GENERATE_READ_PR_REG_CASE(0, pr_read);
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GENERATE_READ_PR_REG_CASE(1, pr_read);
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GENERATE_READ_PR_REG_CASE(2, pr_read);
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GENERATE_READ_PR_REG_CASE(3, pr_read);
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GENERATE_READ_PR_REG_CASE(4, pr_read);
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GENERATE_READ_PR_REG_CASE(5, pr_read);
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GENERATE_READ_PR_REG_CASE(6, pr_read);
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GENERATE_READ_PR_REG_CASE(7, pr_read);
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GENERATE_READ_PR_REG_CASE(8, pr_read);
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GENERATE_READ_PR_REG_CASE(9, pr_read);
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GENERATE_READ_PR_REG_CASE(10, pr_read);
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GENERATE_READ_PR_REG_CASE(11, pr_read);
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GENERATE_READ_PR_REG_CASE(12, pr_read);
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GENERATE_READ_PR_REG_CASE(13, pr_read);
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GENERATE_READ_PR_REG_CASE(14, pr_read);
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GENERATE_READ_PR_REG_CASE(15, pr_read);
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GENERATE_READ_PR_REG_CASE(16, pr_read);
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GENERATE_READ_PR_REG_CASE(17, pr_read);
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GENERATE_READ_PR_REG_CASE(18, pr_read);
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GENERATE_READ_PR_REG_CASE(19, pr_read);
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GENERATE_READ_PR_REG_CASE(20, pr_read);
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GENERATE_READ_PR_REG_CASE(21, pr_read);
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GENERATE_READ_PR_REG_CASE(22, pr_read);
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GENERATE_READ_PR_REG_CASE(23, pr_read);
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GENERATE_READ_PR_REG_CASE(24, pr_read);
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GENERATE_READ_PR_REG_CASE(25, pr_read);
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GENERATE_READ_PR_REG_CASE(26, pr_read);
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GENERATE_READ_PR_REG_CASE(27, pr_read);
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GENERATE_READ_PR_REG_CASE(28, pr_read);
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GENERATE_READ_PR_REG_CASE(29, pr_read);
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GENERATE_READ_PR_REG_CASE(30, pr_read);
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GENERATE_READ_PR_REG_CASE(31, pr_read);
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GENERATE_READ_PR_REG_OTHERS(32 ... 254, pr_read);
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default:
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BUG(); /* Can't happen */
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break;
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}
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}
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void write_protection_region(const pr_t *pr_write, uint8_t sel)
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{
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prepare_selector(&sel);
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switch ( sel )
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{
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GENERATE_WRITE_PR_REG_CASE(0, pr_write);
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GENERATE_WRITE_PR_REG_CASE(1, pr_write);
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GENERATE_WRITE_PR_REG_CASE(2, pr_write);
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GENERATE_WRITE_PR_REG_CASE(3, pr_write);
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GENERATE_WRITE_PR_REG_CASE(4, pr_write);
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GENERATE_WRITE_PR_REG_CASE(5, pr_write);
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GENERATE_WRITE_PR_REG_CASE(6, pr_write);
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GENERATE_WRITE_PR_REG_CASE(7, pr_write);
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GENERATE_WRITE_PR_REG_CASE(8, pr_write);
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GENERATE_WRITE_PR_REG_CASE(9, pr_write);
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GENERATE_WRITE_PR_REG_CASE(10, pr_write);
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GENERATE_WRITE_PR_REG_CASE(11, pr_write);
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GENERATE_WRITE_PR_REG_CASE(12, pr_write);
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GENERATE_WRITE_PR_REG_CASE(13, pr_write);
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GENERATE_WRITE_PR_REG_CASE(14, pr_write);
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GENERATE_WRITE_PR_REG_CASE(15, pr_write);
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GENERATE_WRITE_PR_REG_CASE(16, pr_write);
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GENERATE_WRITE_PR_REG_CASE(17, pr_write);
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GENERATE_WRITE_PR_REG_CASE(18, pr_write);
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GENERATE_WRITE_PR_REG_CASE(19, pr_write);
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GENERATE_WRITE_PR_REG_CASE(20, pr_write);
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GENERATE_WRITE_PR_REG_CASE(21, pr_write);
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GENERATE_WRITE_PR_REG_CASE(22, pr_write);
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GENERATE_WRITE_PR_REG_CASE(23, pr_write);
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GENERATE_WRITE_PR_REG_CASE(24, pr_write);
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GENERATE_WRITE_PR_REG_CASE(25, pr_write);
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GENERATE_WRITE_PR_REG_CASE(26, pr_write);
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GENERATE_WRITE_PR_REG_CASE(27, pr_write);
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GENERATE_WRITE_PR_REG_CASE(28, pr_write);
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GENERATE_WRITE_PR_REG_CASE(29, pr_write);
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GENERATE_WRITE_PR_REG_CASE(30, pr_write);
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GENERATE_WRITE_PR_REG_CASE(31, pr_write);
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GENERATE_WRITE_PR_REG_OTHERS(32 ... 254, pr_write);
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default:
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BUG(); /* Can't happen */
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break;
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}
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}
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/*
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* Local variables:
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* mode: C
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* c-file-style: "BSD"
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* c-basic-offset: 4
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* indent-tabs-mode: nil
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* End:
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*/
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@@ -39,7 +39,6 @@ static void __init __maybe_unused build_assertions(void)
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BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
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}
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#ifdef CONFIG_ARM_64
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pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags)
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{
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unsigned int attr_idx = PAGE_AI_MASK(flags);
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@@ -110,7 +109,6 @@ pr_t pr_of_addr(paddr_t base, paddr_t limit, unsigned int flags)
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return region;
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}
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#endif /* CONFIG_ARM_64 */
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void __init setup_mm(void)
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{
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