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[HVM] Add RDMSR/WRMSR instruction emulation to VMXAssist decoder
AP of PAE SMP windows will use it to set NX bit in EFER. Signed-off-by: Xin Li <xin.b.li@intel.com>
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1 file changed
+18
@@ -1230,6 +1230,18 @@ pushrm(struct regs *regs, int prefix, unsigned modrm)
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enum { OPC_INVALID, OPC_EMULATED };
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#define rdmsr(msr,val1,val2) \
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__asm__ __volatile__( \
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"rdmsr" \
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: "=a" (val1), "=d" (val2) \
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: "c" (msr))
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#define wrmsr(msr,val1,val2) \
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__asm__ __volatile__( \
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"wrmsr" \
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: /* no outputs */ \
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: "c" (msr), "a" (val1), "d" (val2))
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/*
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* Emulate a single instruction, including all its prefixes. We only implement
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* a small subset of the opcodes, and not all opcodes are implemented for each
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@@ -1288,6 +1300,12 @@ opcode(struct regs *regs)
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if (!movcr(regs, prefix, opc))
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goto invalid;
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return OPC_EMULATED;
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case 0x30: /* WRMSR */
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wrmsr(regs->ecx, regs->eax, regs->edx);
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return OPC_EMULATED;
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case 0x32: /* RDMSR */
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rdmsr(regs->ecx, regs->eax, regs->edx);
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return OPC_EMULATED;
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default:
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goto invalid;
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}
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