[HVM] Add RDMSR/WRMSR instruction emulation to VMXAssist decoder

AP of PAE SMP windows will use it to set NX bit in EFER.

Signed-off-by: Xin Li <xin.b.li@intel.com>
This commit is contained in:
kaf24@firebug.cl.cam.ac.uk committed 2006-09-30 11:11:54 +01:00
1 parent 918463b430
commit 137a9ce8c7
1 file changed
+18
+18
View File
@@ -1230,6 +1230,18 @@ pushrm(struct regs *regs, int prefix, unsigned modrm)
enum { OPC_INVALID, OPC_EMULATED };
#define rdmsr(msr,val1,val2) \
__asm__ __volatile__( \
"rdmsr" \
: "=a" (val1), "=d" (val2) \
: "c" (msr))
#define wrmsr(msr,val1,val2) \
__asm__ __volatile__( \
"wrmsr" \
: /* no outputs */ \
: "c" (msr), "a" (val1), "d" (val2))
/*
* Emulate a single instruction, including all its prefixes. We only implement
* a small subset of the opcodes, and not all opcodes are implemented for each
@@ -1288,6 +1300,12 @@ opcode(struct regs *regs)
if (!movcr(regs, prefix, opc))
goto invalid;
return OPC_EMULATED;
case 0x30: /* WRMSR */
wrmsr(regs->ecx, regs->eax, regs->edx);
return OPC_EMULATED;
case 0x32: /* RDMSR */
rdmsr(regs->ecx, regs->eax, regs->edx);
return OPC_EMULATED;
default:
goto invalid;
}
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