x86/HVM: command line option adjustments

Adding actual descriptions for them, hiding the hvm_debug= one from
non-debug builds (the option was recognized but didn't take any effect
so far), and adjusting some debug level specifiers to their purpose.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>

docs/misc/xen-command-line.markdown

@@ -661,9 +661,33 @@ supported only when compiled with XSM\_ENABLE=y on x86.
 ### hvm\_debug
 > `= <integer>`
 
+The specified value is a bit mask with the individual bits having the
+following meaning:
+
+Bit  0 - debug level 0 (unused at present)
+Bit  1 - debug level 1 (Control Register logging)
+Bit  2 - debug level 2 (VMX logging of MSR restores when context switching)
+Bit  3 - debug level 3 (unused at present)
+Bit  4 - I/O operation logging
+Bit  5 - vMMU logging
+Bit  6 - vLAPIC general logging
+Bit  7 - vLAPIC timer logging
+Bit  8 - vLAPIC interrupt logging
+Bit  9 - vIOAPIC logging
+Bit 10 - hypercall logging
+Bit 11 - MSR operation logging
+
+Recognized in debug builds of the hypervisor only.
+
 ### hvm\_port80
 > `= <boolean>`
 
+> Default: `true`
+
+Specify whether guests are to be given access to physical port 80
+(often used for debugging purposes), to override the DMI based
+detection of systems known to misbehave upon accesses to that port.
+
 ### highmem-start
 > `= <size>`
 

xen/arch/x86/hvm/hvm.c

@@ -70,8 +70,10 @@
 
 bool_t __read_mostly hvm_enabled;
 
+#ifdef DBG_LEVEL_0
 unsigned int opt_hvm_debug_level __read_mostly;
 integer_param("hvm_debug", opt_hvm_debug_level);
+#endif
 
 struct hvm_function_table hvm_funcs __read_mostly;
 

xen/arch/x86/hvm/svm/svm.c

@@ -1692,7 +1692,7 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
         goto gpf;
     }
 
-    HVM_DBG_LOG(DBG_LEVEL_1, "returns: ecx=%x, msr_value=%"PRIx64,
+    HVM_DBG_LOG(DBG_LEVEL_MSR, "returns: ecx=%x, msr_value=%"PRIx64,
                 msr, *msr_content);
     return X86EMUL_OKAY;
 

xen/arch/x86/hvm/vmx/vmcs.c

@@ -721,7 +721,7 @@ void vmx_disable_intercept_for_msr(struct vcpu *v, u32 msr, int type)
             clear_bit(msr, msr_bitmap + 0xc00/BYTES_PER_LONG); /* write-high */
     }
     else
-        HVM_DBG_LOG(DBG_LEVEL_0,
+        HVM_DBG_LOG(DBG_LEVEL_MSR,
                    "msr %x is out of the control range"
                    "0x00000000-0x00001fff and 0xc0000000-0xc0001fff"
                    "RDMSR or WRMSR will cause a VM exit", msr); 
@@ -757,7 +757,7 @@ void vmx_enable_intercept_for_msr(struct vcpu *v, u32 msr, int type)
             set_bit(msr, msr_bitmap + 0xc00/BYTES_PER_LONG); /* write-high */
     }
     else
-        HVM_DBG_LOG(DBG_LEVEL_0,
+        HVM_DBG_LOG(DBG_LEVEL_MSR,
                    "msr %x is out of the control range"
                    "0x00000000-0x00001fff and 0xc0000000-0xc0001fff"
                    "RDMSR or WRMSR will cause a VM exit", msr); 

xen/arch/x86/hvm/vmx/vmx.c

@@ -199,7 +199,7 @@ long_mode_do_msr_read(unsigned int msr, uint64_t *msr_content)
         return HNDL_unhandled;
     }
 
-    HVM_DBG_LOG(DBG_LEVEL_0, "msr %#x content %#"PRIx64, msr, *msr_content);
+    HVM_DBG_LOG(DBG_LEVEL_MSR, "msr %#x content %#"PRIx64, msr, *msr_content);
 
     return HNDL_done;
 }
@@ -211,7 +211,7 @@ long_mode_do_msr_write(unsigned int msr, uint64_t msr_content)
     struct vmx_msr_state *guest_msr_state = &v->arch.hvm_vmx.msr_state;
     struct vmx_msr_state *host_msr_state = &this_cpu(host_msr_state);
 
-    HVM_DBG_LOG(DBG_LEVEL_0, "msr %#x content %#"PRIx64, msr, msr_content);
+    HVM_DBG_LOG(DBG_LEVEL_MSR, "msr %#x content %#"PRIx64, msr, msr_content);
 
     switch ( msr )
     {
@@ -254,7 +254,7 @@ long_mode_do_msr_write(unsigned int msr, uint64_t msr_content)
     return HNDL_done;
 
  uncanonical_address:
-    HVM_DBG_LOG(DBG_LEVEL_0, "Not cano address of msr write %x", msr);
+    HVM_DBG_LOG(DBG_LEVEL_MSR, "Not cano address of msr write %x", msr);
     hvm_inject_hw_exception(TRAP_gp_fault, 0);
     return HNDL_exception_raised;
 }
@@ -2046,7 +2046,7 @@ static int is_last_branch_msr(u32 ecx)
 
 static int vmx_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
 {
-    HVM_DBG_LOG(DBG_LEVEL_1, "ecx=%#x", msr);
+    HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x", msr);
 
     switch ( msr )
     {
@@ -2111,7 +2111,7 @@ static int vmx_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
     }
 
 done:
-    HVM_DBG_LOG(DBG_LEVEL_1, "returns: ecx=%#x, msr_value=%#"PRIx64,
+    HVM_DBG_LOG(DBG_LEVEL_MSR, "returns: ecx=%#x, msr_value=%#"PRIx64,
                 msr, *msr_content);
     return X86EMUL_OKAY;
 
@@ -2229,7 +2229,7 @@ static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content)
 {
     struct vcpu *v = current;
 
-    HVM_DBG_LOG(DBG_LEVEL_1, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content);
+    HVM_DBG_LOG(DBG_LEVEL_MSR, "ecx=%#x, msr_value=%#"PRIx64, msr, msr_content);
 
     switch ( msr )
     {