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xen/arm64: head: Introduce a helper to flush local TLBs
Instead of repeating the same sequence of instructions to flush the TLBs
in various places, introduce a macro flush_xen_tlb_local and make use of
it. This is similar to what was done for arm32 by the commit:
dea9dddece
This is also making the flush sequence in enable_mmu more clear and
consistent.
Signed-off-by: Michal Orzel <michal.orzel@amd.com>
Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <jgrall@amazon.com>
This commit is contained in:
1 parent
a8a7c33e7d
commit
15601eed05
1 file changed
+16
-15
+16
-15
@@ -136,6 +136,18 @@
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add \xb, \xb, x20
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.endm
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/*
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* Flush local TLBs
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*
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* See asm/arm64/flushtlb.h for the explanation of the sequence.
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*/
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.macro flush_xen_tlb_local
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dsb nshst
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tlbi alle2
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dsb nsh
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isb
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.endm
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.section .text.header, "ax", %progbits
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/*.aarch64*/
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@@ -721,8 +733,7 @@ enable_mmu:
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* The state of the TLBs is unknown before turning on the MMU.
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* Flush them to avoid stale one.
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*/
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tlbi alle2 /* Flush hypervisor TLBs */
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dsb nsh
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flush_xen_tlb_local
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/* Write Xen's PT's paddr into TTBR0_EL2 */
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msr TTBR0_EL2, x4
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@@ -786,11 +797,7 @@ remove_identity_mapping:
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str xzr, [x0, x1, lsl #3]
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identity_mapping_removed:
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/* See asm/arm64/flushtlb.h for the explanation of the sequence. */
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dsb nshst
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tlbi alle2
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dsb nsh
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isb
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flush_xen_tlb_local
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ret
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ENDPROC(remove_identity_mapping)
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@@ -872,14 +879,8 @@ ENTRY(switch_ttbr_id)
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msr SCTLR_EL2, x1
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isb
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/*
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* 3) Flush the TLBs.
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* See asm/arm64/flushtlb.h for the explanation of the sequence.
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*/
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dsb nshst
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tlbi alle2
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dsb nsh
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isb
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/* 3) Flush the TLBs */
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flush_xen_tlb_local
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/* 4) Update the TTBR */
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msr TTBR0_EL2, x0
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