x86emul: split off insn decoding

This is a fair chunk of code and data and can easily live separate from
the main emulation function.

Code moved gets slightly adjusted in a few places, e.g. replacing EXC_*
by X86_EXC_* (such that EXC_* don't need to move as well; we want these
to be phased out anyway).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
This commit is contained in:
Jan Beulich committed 2023-04-03 12:46:08 +02:00
1 parent 8f196c12ee
commit 1939403104
9 files changed
+1789 -1767

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+1 -1
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@@ -33,7 +33,7 @@ GCOV_FLAGS := --coverage
OBJS := fuzz-emul.o x86-emulate.o
OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o
OBJS += x86_emulate/fpu.o
OBJS += x86_emulate/decode.o x86_emulate/fpu.o
x86-emulate.h: x86_emulate/x86_emulate.h
x86-emulate.o x86-emulate-cov.o: x86-emulate.h x86_emulate/x86_emulate.c x86_emulate/private.h
+1 -1
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@@ -252,7 +252,7 @@ endif # 32-bit override
OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o
OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o
OBJS += x86_emulate/fpu.o
OBJS += x86_emulate/decode.o x86_emulate/fpu.o
$(TARGET): $(OBJS)
$(HOSTCC) $(HOSTCFLAGS) -o $@ $^
-5
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@@ -3,11 +3,6 @@
#include <errno.h>
#include <sys/mman.h>
#define DEFINE_PER_CPU(type, var) type per_cpu_##var
#define this_cpu(var) per_cpu_##var
#define ERR_PTR(val) NULL
/* See gcc bug 100680, but here don't bother making this version dependent. */
#define gcc11_wrap(x) ({ \
unsigned long x_; \
+3
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@@ -48,6 +48,9 @@
#define ASSERT assert
#define ASSERT_UNREACHABLE() assert(!__LINE__)
#define DEFINE_PER_CPU(type, var) type per_cpu_##var
#define this_cpu(var) per_cpu_##var
#define MASK_EXTR(v, m) (((v) & (m)) / ((m) & -(m)))
#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m))
-1
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@@ -9,7 +9,6 @@
* Keir Fraser <keir@xen.org>
*/
#include <xen/err.h>
#include <xen/event.h>
#include <asm/x86_emulate.h>
+1
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@@ -1,4 +1,5 @@
obj-y += 0f01.o
obj-y += 0fae.o
obj-y += 0fc7.o
obj-y += decode.o
obj-$(CONFIG_HVM) += fpu.o
File diff suppressed because it is too large. Load diff
+33
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@@ -39,9 +39,11 @@
#ifdef __i386__
# define mode_64bit() false
# define r(name) e ## name
# define PTR_POISON NULL /* 32-bit builds are for user-space, so NULL is OK. */
#else
# define mode_64bit() (ctxt->addr_size == 64)
# define r(name) r ## name
# define PTR_POISON ((void *)0x8086000000008086UL) /* non-canonical */
#endif
/* Operand sizes: 8-bit operands or specified/overridden size. */
@@ -78,6 +80,23 @@
typedef uint8_t opcode_desc_t;
enum disp8scale {
/* Values 0 ... 4 are explicit sizes. */
d8s_bw = 5,
d8s_dq,
/* EVEX.W ignored outside of 64-bit mode */
d8s_dq64,
/*
* All further values must strictly be last and in the order
* given so that arithmetic on the values works.
*/
d8s_vl,
d8s_vl_by_2,
d8s_vl_by_4,
d8s_vl_by_8,
};
typedef uint8_t disp8scale_t;
/* Type, address-of, and value of an instruction's operand. */
struct operand {
enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type;
@@ -184,6 +203,9 @@ enum vex_pfx {
vex_f2
};
#define VEX_PREFIX_DOUBLE_MASK 0x1
#define VEX_PREFIX_SCALAR_MASK 0x2
union vex {
uint8_t raw[2];
struct { /* SDM names */
@@ -718,6 +740,10 @@ do { \
if ( rc ) goto done; \
} while (0)
int x86emul_decode(struct x86_emulate_state *s,
struct x86_emulate_ctxt *ctxt,
const struct x86_emulate_ops *ops);
int x86emul_fpu(struct x86_emulate_state *s,
struct cpu_user_regs *regs,
struct operand *dst,
@@ -747,6 +773,13 @@ int x86emul_0fc7(struct x86_emulate_state *s,
const struct x86_emulate_ops *ops,
mmval_t *mmvalp);
/* Initialise output state in x86_emulate_ctxt */
static inline void init_context(struct x86_emulate_ctxt *ctxt)
{
ctxt->retire.raw = 0;
x86_emul_reset_event(ctxt);
}
static inline bool is_aligned(enum x86_segment seg, unsigned long offs,
unsigned int size, struct x86_emulate_ctxt *ctxt,
const struct x86_emulate_ops *ops)
File diff suppressed because it is too large. Load diff
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