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docs: remove PVHv1 document
The current misc/pvh.markdown document refers to PVHv1, remove it to
avoid confusion with PVHv2 since the PVHv1 code has already been
removed.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
master commit: 8ac9a25b26
master date: 2017-05-31 08:47:57 +0200
This commit is contained in:
1 parent
0bac1f286a
commit
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# PVH Specification #
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## Rationale ##
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PVH is a new kind of guest that has been introduced on Xen 4.4 as a DomU, and
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on Xen 4.5 as a Dom0. The aim of PVH is to make use of the hardware
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virtualization extensions present in modern x86 CPUs in order to
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improve performance.
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PVH is considered a mix between PV and HVM, and can be seen as a PV guest
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that runs inside of an HVM container, or as a PVHVM guest without any emulated
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devices. The design goal of PVH is to provide the best performance possible and
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to reduce the amount of modifications needed for a guest OS to run in this mode
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(compared to pure PV).
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This document tries to describe the interfaces used by PVH guests, focusing
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on how an OS should make use of them in order to support PVH.
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## Early boot ##
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PVH guests use the PV boot mechanism, that means that the kernel is loaded and
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directly launched by Xen (by jumping into the entry point). In order to do this
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Xen ELF Notes need to be added to the guest kernel, so that they contain the
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information needed by Xen. Here is an example of the ELF Notes added to the
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FreeBSD amd64 kernel in order to boot as PVH:
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ELFNOTE(Xen, XEN_ELFNOTE_GUEST_OS, .asciz, "FreeBSD")
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ELFNOTE(Xen, XEN_ELFNOTE_GUEST_VERSION, .asciz, __XSTRING(__FreeBSD_version))
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ELFNOTE(Xen, XEN_ELFNOTE_XEN_VERSION, .asciz, "xen-3.0")
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ELFNOTE(Xen, XEN_ELFNOTE_VIRT_BASE, .quad, KERNBASE)
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ELFNOTE(Xen, XEN_ELFNOTE_PADDR_OFFSET, .quad, KERNBASE)
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ELFNOTE(Xen, XEN_ELFNOTE_ENTRY, .quad, xen_start)
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ELFNOTE(Xen, XEN_ELFNOTE_HYPERCALL_PAGE, .quad, hypercall_page)
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ELFNOTE(Xen, XEN_ELFNOTE_HV_START_LOW, .quad, HYPERVISOR_VIRT_START)
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ELFNOTE(Xen, XEN_ELFNOTE_FEATURES, .asciz, "writable_descriptor_tables|auto_translated_physmap|supervisor_mode_kernel|hvm_callback_vector")
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ELFNOTE(Xen, XEN_ELFNOTE_PAE_MODE, .asciz, "yes")
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ELFNOTE(Xen, XEN_ELFNOTE_L1_MFN_VALID, .long, PG_V, PG_V)
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ELFNOTE(Xen, XEN_ELFNOTE_LOADER, .asciz, "generic")
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ELFNOTE(Xen, XEN_ELFNOTE_SUSPEND_CANCEL, .long, 0)
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ELFNOTE(Xen, XEN_ELFNOTE_BSD_SYMTAB, .asciz, "yes")
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On the Linux side, the above can be found in `arch/x86/xen/xen-head.S`.
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It is important to highlight the following notes:
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* `XEN_ELFNOTE_ENTRY`: contains the virtual memory address of the kernel entry
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point.
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* `XEN_ELFNOTE_HYPERCALL_PAGE`: contains the virtual memory address of the
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hypercal page inside of the guest kernel (this memory region will be filled
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by Xen prior to booting).
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* `XEN_ELFNOTE_FEATURES`: contains the list of features supported by the kernel.
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In the example above the kernel is only able to boot as a PVH guest, but
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those options can be mixed with the ones used by pure PV guests in order to
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have a kernel that supports both PV and PVH (like Linux). The list of
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options available can be found in the `features.h` public header. Note that
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in the example above `hvm_callback_vector` is in `XEN_ELFNOTE_FEATURES`.
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Older hypervisors will balk at this being part of it, so it can also be put
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in `XEN_ELFNOTE_SUPPORTED_FEATURES` which older hypervisors will ignore.
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Xen will jump into the kernel entry point defined in `XEN_ELFNOTE_ENTRY` with
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paging enabled (either long mode or protected mode with paging turned on
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depending on the kernel bitness) and some basic page tables setup. An important
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distinction for a 64bit PVH is that it is launched at privilege level 0 as
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opposed to a 64bit PV guest which is launched at privilege level 3.
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Also, the `rsi` (`esi` on 32bits) register is going to contain the virtual
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memory address where Xen has placed the `start_info` structure. The `rsp` (`esp`
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on 32bits) will point to the top of an initial single page stack, that can be
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used by the guest kernel. The `start_info` structure contains all the info the
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guest needs in order to initialize. More information about the contents can be
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found in the `xen.h` public header.
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### Initial amd64 control registers values ###
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Initial values for the control registers are set up by Xen before booting the
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guest kernel. The guest kernel can expect to find the following features
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enabled by Xen.
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`CR0` has the following bits set by Xen:
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* PE (bit 0): protected mode enable.
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* ET (bit 4): 387 or newer processor.
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* PG (bit 31): paging enabled.
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`CR4` has the following bits set by Xen:
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* PAE (bit 5): PAE enabled.
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And finally in `EFER` the following features are enabled:
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* LME (bit 8): Long mode enable.
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* LMA (bit 10): Long mode active.
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At least the following flags in `EFER` are guaranteed to be disabled:
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* SCE (bit 0): System call extensions disabled.
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* NXE (bit 11): No-Execute disabled.
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There's no guarantee about the state of the other bits in the `EFER` register.
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All the segments selectors are set with a flat base at zero.
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The `cs` segment selector attributes are set to 0x0a09b, which describes an
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executable and readable code segment only accessible by the most privileged
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level. The segment is also set as a 64-bit code segment (`L` flag set, `D` flag
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unset).
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The remaining segment selectors (`ds`, `ss`, `es`, `fs` and `gs`) are all set
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to the same values. The attributes are set to 0x0c093, which implies a read and
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write data segment only accessible by the most privileged level.
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The `FS.base`, `GS.base` and `KERNEL_GS.base` MSRs are zeroed out.
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The `IDT` and `GDT` are also zeroed, so the guest must be specially careful to
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not trigger a fault until after they have been properly set. The way of setting
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the IDT and the GDT is using the native instructions as would be done on bare
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metal.
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The `RFLAGS` register is guaranteed to be clear when jumping into the kernel
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entry point, with the exception of the reserved bit 1 set.
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## Memory ##
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Since PVH guests rely on virtualization extensions provided by the CPU, they
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have access to a hardware virtualized MMU, which means page-table related
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operations should use the same instructions used on native.
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There are however some differences with native. The usage of native MTRR
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operations is forbidden, and `XENPF_*_memtype` hypercalls should be used
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instead. This can be avoided by simply not using MTRR and setting all the
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memory attributes using PAT, which doesn't require the usage of any hypercalls.
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Since PVH doesn't use a BIOS in order to boot, the physical memory map has
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to be retrieved using the `XENMEM_memory_map` hypercall, which will return
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an e820 map. This memory map might contain holes that describe MMIO regions,
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that will be already setup by Xen.
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*TODO*: we need to figure out what to do with MMIO regions, right now Xen
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sets all the holes in the native e820 to MMIO regions for Dom0 up to 4GB. We
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need to decide what to do with MMIO regions above 4GB on Dom0, and what to do
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for PVH DomUs with pci-passthrough.
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In the case of a guest started with memory != maxmem, the e820 memory map
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returned by Xen will contain the memory up to maxmem. The guest has to be very
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careful to only use the lower memory pages up to the value contained in
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`start_info->nr_pages` because any memory page above that value will not be
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populated.
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## Physical devices ##
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When running as Dom0 the guest OS has the ability to interact with the physical
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devices present in the system. A note should be made that PVH guests require
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a working IOMMU in order to interact with physical devices.
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The first step in order to manipulate the devices is to make Xen aware of
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them. Due to the fact that all the hardware description on x86 comes from
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ACPI, Dom0 is responsible for parsing the ACPI tables and notifying Xen about
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the devices it finds. This is done with the `PHYSDEVOP_pci_device_add`
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hypercall.
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*TODO*: explain the way to register the different kinds of PCI devices, like
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devices with virtual functions.
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## Interrupts ##
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All interrupts on PVH guests are routed over event channels, see
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[Event Channel Internals][event_channels] for more detailed information about
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event channels. In order to inject interrupts into the guest an IDT vector is
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used. This is the same mechanism used on PVHVM guests, and allows having
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per-cpu interrupts that can be used to deliver timers or IPIs.
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In order to register the callback IDT vector the `HVMOP_set_param` hypercall
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is used with the following values:
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domid = DOMID_SELF
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index = HVM_PARAM_CALLBACK_IRQ
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value = (0x2 << 56) | vector_value
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The OS has to program the IDT for the `vector_value` using the baremetal
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mechanism.
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In order to know which event channel has fired, we need to look into the
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information provided in the `shared_info` structure. The `evtchn_pending`
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array is used as a bitmap in order to find out which event channel has
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fired. Event channels can also be masked by setting it's port value in the
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`shared_info->evtchn_mask` bitmap.
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### Interrupts from physical devices ###
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When running as Dom0 (or when using pci-passthrough) interrupts from physical
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devices are routed over event channels. There are 3 different kind of
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physical interrupts that can be routed over event channels by Xen: IO APIC,
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MSI and MSI-X interrupts.
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Since physical interrupts usually need EOI (End Of Interrupt), Xen allows the
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registration of a memory region that will contain whether a physical interrupt
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needs EOI from the guest or not. This is done with the
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`PHYSDEVOP_pirq_eoi_gmfn_v2` hypercall that takes a parameter containing the
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physical address of the memory page that will act as a bitmap. Then in order to
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find out if an IRQ needs EOI or not, the OS can perform a simple bit test on the
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memory page using the PIRQ value.
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### IO APIC interrupt routing ###
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IO APIC interrupts can be routed over event channels using `PHYSDEVOP`
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hypercalls. First the IRQ is registered using the `PHYSDEVOP_map_pirq`
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hypercall, as an example IRQ#9 is used here:
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domid = DOMID_SELF
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type = MAP_PIRQ_TYPE_GSI
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index = 9
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pirq = 9
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The IRQ#9 is now registered as PIRQ#9. The triggering and polarity can also
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be configured using the `PHYSDEVOP_setup_gsi` hypercall:
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gsi = 9 # This is the IRQ value.
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triggering = 0
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polarity = 0
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In this example the IRQ would be configured to use edge triggering and high
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polarity.
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Finally the PIRQ can be bound to an event channel using the
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`EVTCHNOP_bind_pirq`, that will return the event channel port the PIRQ has been
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assigned. After this the event channel will be ready for delivery.
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*NOTE*: when running as Dom0, the guest has to parse the interrupt overrides
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found on the ACPI tables and notify Xen about them.
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### MSI ###
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In order to configure MSI interrupts for a device, Xen must be made aware of
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it's presence first by using the `PHYSDEVOP_pci_device_add` as described above.
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Then the `PHYSDEVOP_map_pirq` hypercall is used:
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domid = DOMID_SELF
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type = MAP_PIRQ_TYPE_MSI_SEG or MAP_PIRQ_TYPE_MULTI_MSI
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index = -1
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pirq = -1
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bus = pci_device_bus
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devfn = pci_device_function
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entry_nr = number of MSI interrupts
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The type has to be set to `MAP_PIRQ_TYPE_MSI_SEG` if only one MSI interrupt
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source is being configured. On devices that support MSI interrupt groups
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`MAP_PIRQ_TYPE_MULTI_MSI` can be used to configure them by also placing the
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number of MSI interrupts in the `entry_nr` field.
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The values in the `bus` and `devfn` field should be the same as the ones used
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when registering the device with `PHYSDEVOP_pci_device_add`.
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### MSI-X ###
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*TODO*: how to register/use them.
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## Event timers and timecounters ##
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Since some hardware is not available on PVH (like the local APIC), Xen provides
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the OS with suitable replacements in order to get the same functionality. One
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of them is the timer interface. Using a set of hypercalls, a guest OS can set
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event timers that will deliver and event channel interrupt to the guest.
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In order to use the timer provided by Xen the guest OS first needs to register
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a VIRQ event channel to be used by the timer to deliver the interrupts. The
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event channel is registered using the `EVTCHNOP_bind_virq` hypercall, that
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only takes two parameters:
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virq = VIRQ_TIMER
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vcpu = vcpu_id
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The port that's going to be used by Xen in order to deliver the interrupt is
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returned in the `port` field. Once the interrupt is set, the timer can be
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programmed using the `VCPUOP_set_singleshot_timer` hypercall.
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flags = VCPU_SSHOTTMR_future
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timeout_abs_ns = absolute value when the timer should fire
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It is important to notice that the `VCPUOP_set_singleshot_timer` hypercall must
|
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be executed from the same vCPU where the timer should fire, or else Xen will
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refuse to set it. This is a single-shot timer, so it must be set by the OS
|
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every time it fires if a periodic timer is desired.
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Xen also shares a memory region with the guest OS that contains time related
|
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values that are updated periodically. This values can be used to implement a
|
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timecounter or to obtain the current time. This information is placed inside of
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`shared_info->vcpu_info[vcpu_id].time`. The uptime (time since the guest has
|
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been launched) can be calculated using the following expression and the values
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stored in the `vcpu_time_info` struct:
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system_time + ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
|
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|
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The timeout that is passed to `VCPUOP_set_singleshot_timer` has to be
|
||||
calculated using the above value, plus the timeout the system wants to set.
|
||||
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If the OS also wants to obtain the current wallclock time, the value calculated
|
||||
above has to be added to the values found in `shared_info->wc_sec` and
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`shared_info->wc_nsec`.
|
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## SMP discover and bring up ##
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The process of bringing up secondary CPUs is obviously different from native,
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since PVH doesn't have a local APIC. The first thing to do is to figure out
|
||||
how many vCPUs the guest has. This is done using the `VCPUOP_is_up` hypercall,
|
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using for example this simple loop:
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||||
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for (i = 0; i < MAXCPU; i++) {
|
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ret = HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL);
|
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if (ret >= 0)
|
||||
/* vCPU#i is present */
|
||||
}
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||||
|
||||
Note than when running as Dom0, the ACPI tables might report a different number
|
||||
of available CPUs. This is because the value on the ACPI tables is the
|
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number of physical CPUs the host has, and it might bear no resemblance with the
|
||||
number of vCPUs Dom0 actually has so it should be ignored.
|
||||
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||||
In order to bring up the secondary vCPUs they must be configured first. This is
|
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achieved using the `VCPUOP_initialise` hypercall. A valid context has to be
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||||
passed to the vCPU in order to boot. The relevant fields for PVH guests are
|
||||
the following:
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||||
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||||
* `flags`: contains `VGCF_*` flags (see `arch-x86/xen.h` public header).
|
||||
* `user_regs`: struct that contains the register values that will be set on
|
||||
the vCPU before booting. All GPRs are available to be set, however, the
|
||||
most relevant ones are `rip` and `rsp` in order to set the start address
|
||||
and the stack. Please note, all selectors must be null.
|
||||
* `ctrlreg[3]`: contains the address of the page tables that will be used by
|
||||
the vCPU. Other control registers should be set to zero, or else the
|
||||
hypercall will fail with -EINVAL.
|
||||
|
||||
After the vCPU is initialized with the proper values, it can be started by
|
||||
using the `VCPUOP_up` hypercall. The values of the other control registers of
|
||||
the vCPU will be the same as the ones described in the `control registers`
|
||||
section.
|
||||
|
||||
Examples about how to bring up secondary CPUs can be found on the FreeBSD
|
||||
code base in `sys/x86/xen/pv.c` and on Linux `arch/x86/xen/smp.c`.
|
||||
|
||||
## Control operations (reboot/shutdown) ##
|
||||
|
||||
Reboot and shutdown operations on PVH guests are performed using hypercalls.
|
||||
In order to issue a reboot, a guest must use the `SHUTDOWN_reboot` hypercall.
|
||||
In order to perform a power off from a guest DomU, the `SHUTDOWN_poweroff`
|
||||
hypercall should be used.
|
||||
|
||||
The way to perform a full system power off from Dom0 is different than what's
|
||||
done in a DomU guest. In order to perform a power off from Dom0 the native
|
||||
ACPI path should be followed, but the guest should not write the `SLP_EN`
|
||||
bit to the Pm1Control register. Instead the `XENPF_enter_acpi_sleep` hypercall
|
||||
should be used, filling the following data in the `xen_platform_op` struct:
|
||||
|
||||
cmd = XENPF_enter_acpi_sleep
|
||||
interface_version = XENPF_INTERFACE_VERSION
|
||||
u.enter_acpi_sleep.pm1a_cnt_val = Pm1aControlValue
|
||||
u.enter_acpi_sleep.pm1b_cnt_val = Pm1bControlValue
|
||||
|
||||
This will allow Xen to do it's clean up and to power off the system. If the
|
||||
host is using hardware reduced ACPI, the following field should also be set:
|
||||
|
||||
u.enter_acpi_sleep.flags = XENPF_ACPI_SLEEP_EXTENDED (0x1)
|
||||
|
||||
## CPUID ##
|
||||
|
||||
The cpuid instruction that should be used is the normal `cpuid`, not the
|
||||
emulated `cpuid` that PV guests usually require.
|
||||
|
||||
*TDOD*: describe which cpuid flags a guest should ignore and also which flags
|
||||
describe features can be used. It would also be good to describe the set of
|
||||
cpuid flags that will always be present when running as PVH.
|
||||
|
||||
## Final notes ##
|
||||
|
||||
All the other hardware functionality not described in this document should be
|
||||
assumed to be performed in the same way as native.
|
||||
|
||||
[event_channels]: http://wiki.xen.org/wiki/Event_Channel_Internals
|
||||