drivers/char: pl011: Enable receive timeout interrupt

The commit 874f76a "PL011: fix reverse logic for interrupt mask register"
introduced regression on the Versatile Express. The board didn't receive
correctly input.

The timeout interrupt may be asserted when the FIFO is not empty, and no futher
data is received over a 32-bit period.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>

xen/drivers/char/pl011.c

@@ -140,7 +140,7 @@ static void __init pl011_init_postirq(struct serial_port *port)
     pl011_write(uart, ICR, OEI|BEI|PEI|FEI);
 
     /* Unmask interrupts */
-    pl011_write(uart, IMSC, OEI|BEI|PEI|FEI|TXI|RXI);
+    pl011_write(uart, IMSC, RTI|OEI|BEI|PEI|FEI|TXI|RXI);
 }
 
 static void pl011_suspend(struct serial_port *port)