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x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows.
This patch implements the Domain init/free and schedule flows. - When domain init, its psr resource should be allocated. - When domain free, its psr resource should be freed too. - When domain is scheduled, its COS ID on the socket should be set into ASSOC register to make corresponding COS MSR value work. Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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+65
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@@ -495,8 +495,7 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags,
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}
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spin_lock_init(&d->arch.e820_lock);
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if ( (rc = psr_domain_init(d)) != 0 )
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goto fail;
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psr_domain_init(d);
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if ( is_hvm_domain(d) )
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{
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+63
-4
@@ -50,6 +50,8 @@
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*/
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#define MAX_COS_REG_CNT 128
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#define ASSOC_REG_SHIFT 32
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/*
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* Every PSR feature uses some COS registers for each COS ID, e.g. CDP uses 2
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* COS registers (DATA and CODE) for one COS ID, but CAT uses 1 COS register.
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@@ -372,11 +374,37 @@ void psr_free_rmid(struct domain *d)
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d->arch.psr_rmid = 0;
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}
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static inline void psr_assoc_init(void)
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static unsigned int get_max_cos_max(const struct psr_socket_info *info)
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{
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unsigned int cos_max = 0, i;
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for ( i = 0; i < ARRAY_SIZE(info->features); i++ )
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{
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const struct feat_node *feat = info->features[i];
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if ( feat )
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cos_max = max(feat->cos_max, cos_max);
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}
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return cos_max;
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}
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static void psr_assoc_init(void)
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{
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struct psr_assoc *psra = &this_cpu(psr_assoc);
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if ( psr_cmt_enabled() )
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if ( psr_alloc_feat_enabled() )
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{
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unsigned int socket = cpu_to_socket(smp_processor_id());
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const struct psr_socket_info *info = socket_info + socket;
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unsigned int cos_max = get_max_cos_max(info);
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if ( info->feat_init )
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psra->cos_mask = ((1ull << get_count_order(cos_max)) - 1) <<
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ASSOC_REG_SHIFT;
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}
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if ( psr_cmt_enabled() || psra->cos_mask )
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rdmsrl(MSR_IA32_PSR_ASSOC, psra->val);
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}
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@@ -385,6 +413,13 @@ static inline void psr_assoc_rmid(uint64_t *reg, unsigned int rmid)
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*reg = (*reg & ~rmid_mask) | (rmid & rmid_mask);
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}
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static uint64_t psr_assoc_cos(uint64_t reg, unsigned int cos,
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uint64_t cos_mask)
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{
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return (reg & ~cos_mask) |
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(((uint64_t)cos << ASSOC_REG_SHIFT) & cos_mask);
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}
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void psr_ctxt_switch_to(struct domain *d)
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{
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struct psr_assoc *psra = &this_cpu(psr_assoc);
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@@ -393,6 +428,14 @@ void psr_ctxt_switch_to(struct domain *d)
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if ( psr_cmt_enabled() )
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psr_assoc_rmid(®, d->arch.psr_rmid);
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/* If domain's 'psr_cos_ids' is NULL, we set default value for it. */
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if ( psra->cos_mask )
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reg = psr_assoc_cos(reg,
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(d->arch.psr_cos_ids ?
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d->arch.psr_cos_ids[cpu_to_socket(smp_processor_id())] :
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0),
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psra->cos_mask);
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if ( reg != psra->val )
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{
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wrmsrl(MSR_IA32_PSR_ASSOC, reg);
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@@ -418,14 +461,30 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket,
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return 0;
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}
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int psr_domain_init(struct domain *d)
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/* Called with domain lock held, no extra lock needed for 'psr_cos_ids' */
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static void psr_free_cos(struct domain *d)
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{
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return 0;
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xfree(d->arch.psr_cos_ids);
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d->arch.psr_cos_ids = NULL;
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}
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static void psr_alloc_cos(struct domain *d)
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{
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d->arch.psr_cos_ids = xzalloc_array(unsigned int, nr_sockets);
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if ( !d->arch.psr_cos_ids )
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printk(XENLOG_WARNING "Failed to alloc psr_cos_ids!\n");
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}
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void psr_domain_init(struct domain *d)
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{
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if ( psr_alloc_feat_enabled() )
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psr_alloc_cos(d);
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}
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void psr_domain_free(struct domain *d)
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{
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psr_free_rmid(d);
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psr_free_cos(d);
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}
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static void __init init_psr(void)
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@@ -71,7 +71,7 @@ int psr_get_l3_cbm(struct domain *d, unsigned int socket,
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int psr_set_l3_cbm(struct domain *d, unsigned int socket,
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uint64_t cbm, enum cbm_type type);
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int psr_domain_init(struct domain *d);
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void psr_domain_init(struct domain *d);
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void psr_domain_free(struct domain *d);
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#endif /* __ASM_PSR_H__ */
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