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Code Issues Activity

xen/arm: move vgic defines to vgic header file

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gic.h contains defines of vgic. Move these to vgic
header file. Also move inline functions and defines/macros
in vgic.c to vgic.h. These vgic functions and macros
can be used by other GIC HW specific VGIC drivers,

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
This commit is contained in:
Vijaya Kumar K authored and Ian Campbell committed 2014-07-02 12:27:06 +01:00
1 parent 28b9ee72d9
commit 1f83dbf0b5
7 files changed
+65 -60
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xen/arch/arm/irq.c
+1
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@@ -26,6 +26,7 @@
#include <xen/sched.h>
#include <asm/gic.h>
#include <asm/vgic.h>
static unsigned int local_irqs_type[NR_LOCAL_IRQS];
static DEFINE_SPINLOCK(local_irqs_type_lock);
xen/arch/arm/time.c
+1
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@@ -32,6 +32,7 @@
#include <asm/system.h>
#include <asm/time.h>
#include <asm/gic.h>
#include <asm/vgic.h>
#include <asm/cpufeature.h>
#include <asm/platform.h>
xen/arch/arm/vgic.c
-53
View File
@@ -33,34 +33,9 @@
#define REG(n) (n)
/* Number of ranks of interrupt registers for a domain */
#define DOMAIN_NR_RANKS(d) (((d)->arch.vgic.nr_lines+31)/32)
static int vgic_distr_mmio_read(struct vcpu *v, mmio_info_t *info);
static int vgic_distr_mmio_write(struct vcpu *v, mmio_info_t *info);
/*
* Rank containing GICD_<FOO><n> for GICD_<FOO> with
* <b>-bits-per-interrupt
*/
static inline int REG_RANK_NR(int b, uint32_t n)
{
switch ( b )
{
case 8: return n >> 3;
case 4: return n >> 2;
case 2: return n >> 1;
case 1: return n;
default: BUG();
}
}
/*
* Offset of GICD_<FOO><n> with its rank, for GICD_<FOO> with
* <b>-bits-per-interrupt.
*/
#define REG_RANK_INDEX(b, n) (((n) >> 2) & ((b)-1))
/*
* Returns rank corresponding to a GICD_<FOO><n> register for
* GICD_<FOO> with <b>-bits-per-interrupt.
@@ -174,34 +149,6 @@ int vcpu_vgic_free(struct vcpu *v)
return 0;
}
#define vgic_lock(v) spin_lock_irq(&(v)->domain->arch.vgic.lock)
#define vgic_unlock(v) spin_unlock_irq(&(v)->domain->arch.vgic.lock)
#define vgic_lock_rank(v, r) spin_lock(&(r)->lock)
#define vgic_unlock_rank(v, r) spin_unlock(&(r)->lock)
static uint32_t vgic_byte_read(uint32_t val, int sign, int offset)
{
int byte = offset & 0x3;
val = val >> (8*byte);
if ( sign && (val & 0x80) )
val |= 0xffffff00;
else
val &= 0x000000ff;
return val;
}
static void vgic_byte_write(uint32_t *reg, uint32_t var, int offset)
{
int byte = offset & 0x3;
var &= (0xff << (8*byte));
*reg &= ~(0xff << (8*byte));
*reg |= var;
}
static int vgic_distr_mmio_read(struct vcpu *v, mmio_info_t *info)
{
struct hsr_dabt dabt = info->dabt;
xen/arch/arm/vpsci.c
+1
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@@ -16,6 +16,7 @@
#include <asm/current.h>
#include <asm/gic.h>
#include <asm/vgic.h>
#include <asm/psci.h>
int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point)
xen/arch/arm/vtimer.c
+1
View File
@@ -24,6 +24,7 @@
#include <asm/irq.h>
#include <asm/time.h>
#include <asm/gic.h>
#include <asm/vgic.h>
#include <asm/regs.h>
extern s_time_t ticks_to_ns(uint64_t ticks);
xen/include/asm-arm/gic.h
-7
View File
@@ -188,13 +188,6 @@ enum gic_version {
};
extern enum gic_version gic_hw_version(void);
extern int domain_vgic_init(struct domain *d);
extern void domain_vgic_free(struct domain *d);
extern int vcpu_vgic_init(struct vcpu *v);
extern void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq);
extern void vgic_clear_pending_irqs(struct vcpu *v);
extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq);
/* Program the GIC to route an interrupt */
xen/include/asm-arm/vgic.h
+61
View File
@@ -18,6 +18,8 @@
#ifndef __ASM_ARM_VGIC_H__
#define __ASM_ARM_VGIC_H__
#include <xen/bitops.h>
/* Represents state corresponding to a block of 32 interrupts */
struct vgic_irq_rank {
spinlock_t lock; /* Covers access to all other members of this struct */
@@ -27,6 +29,65 @@ struct vgic_irq_rank {
uint32_t itargets[8];
};
/* Number of ranks of interrupt registers for a domain */
#define DOMAIN_NR_RANKS(d) (((d)->arch.vgic.nr_lines+31)/32)
#define vgic_lock(v) spin_lock_irq(&(v)->domain->arch.vgic.lock)
#define vgic_unlock(v) spin_unlock_irq(&(v)->domain->arch.vgic.lock)
#define vgic_lock_rank(v, r) spin_lock(&(r)->lock)
#define vgic_unlock_rank(v, r) spin_unlock(&(r)->lock)
/*
* Rank containing GICD_<FOO><n> for GICD_<FOO> with
* <b>-bits-per-interrupt
*/
static inline int REG_RANK_NR(int b, uint32_t n)
{
switch ( b )
{
case 8: return n >> 3;
case 4: return n >> 2;
case 2: return n >> 1;
case 1: return n;
default: BUG();
}
}
static inline uint32_t vgic_byte_read(uint32_t val, int sign, int offset)
{
int byte = offset & 0x3;
val = val >> (8*byte);
if ( sign && (val & 0x80) )
val |= 0xffffff00;
else
val &= 0x000000ff;
return val;
}
static inline void vgic_byte_write(uint32_t *reg, uint32_t var, int offset)
{
int byte = offset & 0x3;
var &= (0xff << (8*byte));
*reg &= ~(0xff << (8*byte));
*reg |= var;
}
/*
* Offset of GICD_<FOO><n> with its rank, for GICD_<FOO> with
* <b>-bits-per-interrupt.
*/
#define REG_RANK_INDEX(b, n) (((n) >> 2) & ((b)-1))
extern int domain_vgic_init(struct domain *d);
extern void domain_vgic_free(struct domain *d);
extern int vcpu_vgic_init(struct vcpu *v);
extern void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq);
extern void vgic_clear_pending_irqs(struct vcpu *v);
extern int vcpu_vgic_free(struct vcpu *v);
#endif /* __ASM_ARM_VGIC_H__ */
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