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x86/msr: AMD MSR_SPEC_CTRL infrastructure
Fill in VMCB accessors for spec_ctrl in svm_{get,set}_reg(), and CPUID checks
for all supported bits in guest_{rd,wr}msr().
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
This commit is contained in:
1 parent
614cec7d79
commit
22b9add22b
2 files changed
+14
-3
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@@ -2471,10 +2471,14 @@ static bool svm_get_pending_event(struct vcpu *v, struct x86_event *info)
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static uint64_t svm_get_reg(struct vcpu *v, unsigned int reg)
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{
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const struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb;
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struct domain *d = v->domain;
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switch ( reg )
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{
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case MSR_SPEC_CTRL:
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return vmcb->spec_ctrl;
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default:
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printk(XENLOG_G_ERR "%s(%pv, 0x%08x) Bad register\n",
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__func__, v, reg);
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@@ -2485,10 +2489,15 @@ static uint64_t svm_get_reg(struct vcpu *v, unsigned int reg)
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static void svm_set_reg(struct vcpu *v, unsigned int reg, uint64_t val)
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{
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struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb;
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struct domain *d = v->domain;
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switch ( reg )
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{
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case MSR_SPEC_CTRL:
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vmcb->spec_ctrl = val;
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break;
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default:
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printk(XENLOG_G_ERR "%s(%pv, 0x%08x, 0x%016"PRIx64") Bad register\n",
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__func__, v, reg, val);
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+5
-3
@@ -265,7 +265,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
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break;
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case MSR_SPEC_CTRL:
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if ( !cp->feat.ibrsb )
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if ( !cp->feat.ibrsb && !cp->extd.ibrs )
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goto gp_fault;
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goto get_reg;
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@@ -442,7 +442,8 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
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*/
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uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp)
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{
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bool ssbd = cp->feat.ssbd;
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bool ssbd = cp->feat.ssbd || cp->extd.amd_ssbd;
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bool psfd = cp->extd.psfd;
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/*
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* Note: SPEC_CTRL_STIBP is specified as safe to use (i.e. ignored)
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@@ -450,6 +451,7 @@ uint64_t msr_spec_ctrl_valid_bits(const struct cpuid_policy *cp)
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*/
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return (SPEC_CTRL_IBRS | SPEC_CTRL_STIBP |
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(ssbd ? SPEC_CTRL_SSBD : 0) |
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(psfd ? SPEC_CTRL_PSFD : 0) |
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0);
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}
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@@ -526,7 +528,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
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break;
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case MSR_SPEC_CTRL:
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if ( !cp->feat.ibrsb ||
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if ( (!cp->feat.ibrsb && !cp->extd.ibrs) ||
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(val & ~msr_spec_ctrl_valid_bits(cp)) )
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goto gp_fault;
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goto set_reg;
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