x86/microcode: Add support for fam17h microcode loading

The size for the Microcode Patch Block (MPB) for an AMD family 17h
processor is 3200 bytes.  Add a #define for fam17h so that it does
not default to 2048 bytes and fail a microcode load/update.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@alien8.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
[Linux commit f4e9b7af0cd58dd039a0fb2cd67d57cea4889abf]

Ported to Xen.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
master commit: 61d458ba8c
master date: 2017-12-13 14:30:10 +0000

xen/arch/x86/microcode_amd.c

@@ -108,6 +108,7 @@ static bool_t verify_patch_size(uint32_t patch_size)
 #define F14H_MPB_MAX_SIZE 1824
 #define F15H_MPB_MAX_SIZE 4096
 #define F16H_MPB_MAX_SIZE 3458
+#define F17H_MPB_MAX_SIZE 3200
 
     switch (boot_cpu_data.x86)
     {
@@ -120,6 +121,9 @@ static bool_t verify_patch_size(uint32_t patch_size)
     case 0x16:
         max_size = F16H_MPB_MAX_SIZE;
         break;
+    case 0x17:
+        max_size = F17H_MPB_MAX_SIZE;
+        break;
     default:
         max_size = F1XH_MPB_MAX_SIZE;
         break;