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x86emul: flatten twobyte_table[]
... in the hope of making it more readable, and in preparation of adding a second field to the structure. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
Jan Beulich committed
1 parent
ff2f835283
commit
28722e98f7
1 file changed
+80
-102
@@ -180,104 +180,82 @@ static const opcode_desc_t opcode_table[256] = {
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ImplicitOps, ImplicitOps, ByteOp|DstMem|SrcNone|ModRM, DstMem|SrcNone|ModRM
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};
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static const opcode_desc_t twobyte_table[256] = {
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/* 0x00 - 0x07 */
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ModRM, ImplicitOps|ModRM, DstReg|SrcMem16|ModRM, DstReg|SrcMem16|ModRM,
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0, ImplicitOps, ImplicitOps, ImplicitOps,
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/* 0x08 - 0x0F */
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ImplicitOps, ImplicitOps, 0, ImplicitOps,
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0, ImplicitOps|ModRM, ImplicitOps, ModRM|SrcImmByte,
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/* 0x10 - 0x17 */
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ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM,
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ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM,
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/* 0x18 - 0x1F */
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ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM,
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ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM,
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/* 0x20 - 0x27 */
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DstMem|SrcImplicit|ModRM, DstMem|SrcImplicit|ModRM,
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DstImplicit|SrcMem|ModRM, DstImplicit|SrcMem|ModRM,
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0, 0, 0, 0,
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/* 0x28 - 0x2F */
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ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM,
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ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM,
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/* 0x30 - 0x37 */
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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ImplicitOps, ImplicitOps, 0, ImplicitOps,
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/* 0x38 - 0x3F */
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DstReg|SrcMem|ModRM, 0, DstReg|SrcImmByte|ModRM, 0, 0, 0, 0, 0,
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/* 0x40 - 0x47 */
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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/* 0x48 - 0x4F */
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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/* 0x50 - 0x5F */
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM,
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM,
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/* 0x60 - 0x6F */
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM,
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ImplicitOps|ModRM,
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/* 0x70 - 0x7F */
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SrcImmByte|ModRM, SrcImmByte|ModRM, SrcImmByte|ModRM, SrcImmByte|ModRM,
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ModRM, ModRM, ModRM, ImplicitOps,
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ModRM, ModRM, 0, 0, ModRM, ModRM, ImplicitOps|ModRM, ImplicitOps|ModRM,
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/* 0x80 - 0x87 */
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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/* 0x88 - 0x8F */
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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DstImplicit|SrcImm, DstImplicit|SrcImm,
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/* 0x90 - 0x97 */
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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/* 0x98 - 0x9F */
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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ByteOp|DstMem|SrcNone|ModRM|Mov, ByteOp|DstMem|SrcNone|ModRM|Mov,
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/* 0xA0 - 0xA7 */
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ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps, DstBitBase|SrcReg|ModRM,
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DstMem|SrcImmByte|ModRM, DstMem|SrcReg|ModRM, ModRM, ModRM,
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/* 0xA8 - 0xAF */
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ImplicitOps|Mov, ImplicitOps|Mov, ImplicitOps, DstBitBase|SrcReg|ModRM,
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DstMem|SrcImmByte|ModRM, DstMem|SrcReg|ModRM,
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ImplicitOps|ModRM, DstReg|SrcMem|ModRM,
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/* 0xB0 - 0xB7 */
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ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM,
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DstReg|SrcMem|ModRM|Mov, DstBitBase|SrcReg|ModRM,
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DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem|ModRM|Mov,
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ByteOp|DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem16|ModRM|Mov,
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/* 0xB8 - 0xBF */
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DstReg|SrcMem|ModRM, ModRM,
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DstBitBase|SrcImmByte|ModRM, DstBitBase|SrcReg|ModRM,
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DstReg|SrcMem|ModRM, DstReg|SrcMem|ModRM,
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ByteOp|DstReg|SrcMem|ModRM|Mov, DstReg|SrcMem16|ModRM|Mov,
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/* 0xC0 - 0xC7 */
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ByteOp|DstMem|SrcReg|ModRM, DstMem|SrcReg|ModRM,
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SrcImmByte|ModRM, DstMem|SrcReg|ModRM|Mov,
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SrcImmByte|ModRM, SrcImmByte|ModRM, SrcImmByte|ModRM, ImplicitOps|ModRM,
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/* 0xC8 - 0xCF */
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
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/* 0xD0 - 0xDF */
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ImplicitOps|ModRM, ModRM,
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM,
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/* 0xE0 - 0xEF */
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ImplicitOps|ModRM,
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM,
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/* 0xF0 - 0xFF */
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM,
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ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM, ModRM
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static const struct {
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opcode_desc_t desc;
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} twobyte_table[256] = {
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[0x00] = { ModRM },
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[0x01] = { ImplicitOps|ModRM },
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[0x02] = { DstReg|SrcMem16|ModRM },
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[0x03] = { DstReg|SrcMem16|ModRM },
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[0x05] = { ImplicitOps },
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[0x06] = { ImplicitOps },
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[0x07] = { ImplicitOps },
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[0x08] = { ImplicitOps },
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[0x09] = { ImplicitOps },
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[0x0b] = { ImplicitOps },
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[0x0d] = { ImplicitOps|ModRM },
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[0x0e] = { ImplicitOps },
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[0x0f] = { ModRM|SrcImmByte },
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[0x10 ... 0x1f] = { ImplicitOps|ModRM },
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[0x20 ... 0x21] = { DstMem|SrcImplicit|ModRM },
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[0x22 ... 0x23] = { DstImplicit|SrcMem|ModRM },
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[0x28 ... 0x2f] = { ImplicitOps|ModRM },
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[0x30 ... 0x35] = { ImplicitOps },
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[0x37] = { ImplicitOps },
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[0x38] = { DstReg|SrcMem|ModRM },
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[0x3a] = { DstReg|SrcImmByte|ModRM },
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[0x40 ... 0x4f] = { DstReg|SrcMem|ModRM|Mov },
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[0x50 ... 0x6e] = { ModRM },
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[0x6f] = { ImplicitOps|ModRM },
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[0x70 ... 0x73] = { SrcImmByte|ModRM },
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[0x74 ... 0x76] = { ModRM },
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[0x77] = { ImplicitOps },
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[0x78 ... 0x79] = { ModRM },
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[0x7c ... 0x7d] = { ModRM },
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[0x7e ... 0x7f] = { ImplicitOps|ModRM },
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[0x80 ... 0x8f] = { DstImplicit|SrcImm },
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[0x90 ... 0x9f] = { ByteOp|DstMem|SrcNone|ModRM|Mov },
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[0xa0 ... 0xa1] = { ImplicitOps|Mov },
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[0xa2] = { ImplicitOps },
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[0xa3] = { DstBitBase|SrcReg|ModRM },
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[0xa4] = { DstMem|SrcImmByte|ModRM },
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[0xa5] = { DstMem|SrcReg|ModRM },
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[0xa6 ... 0xa7] = { ModRM },
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[0xa8 ... 0xa9] = { ImplicitOps|Mov },
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[0xaa] = { ImplicitOps },
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[0xab] = { DstBitBase|SrcReg|ModRM },
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[0xac] = { DstMem|SrcImmByte|ModRM },
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[0xad] = { DstMem|SrcReg|ModRM },
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[0xae] = { ImplicitOps|ModRM },
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[0xaf] = { DstReg|SrcMem|ModRM },
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[0xb0] = { ByteOp|DstMem|SrcReg|ModRM },
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[0xb1] = { DstMem|SrcReg|ModRM },
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[0xb2] = { DstReg|SrcMem|ModRM|Mov },
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[0xb3] = { DstBitBase|SrcReg|ModRM },
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[0xb4 ... 0xb5] = { DstReg|SrcMem|ModRM|Mov },
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[0xb6] = { ByteOp|DstReg|SrcMem|ModRM|Mov },
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[0xb7] = { DstReg|SrcMem16|ModRM|Mov },
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[0xb8] = { DstReg|SrcMem|ModRM },
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[0xb9] = { ModRM },
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[0xba] = { DstBitBase|SrcImmByte|ModRM },
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[0xbb] = { DstBitBase|SrcReg|ModRM },
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[0xbc ... 0xbd] = { DstReg|SrcMem|ModRM },
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[0xbe] = { ByteOp|DstReg|SrcMem|ModRM|Mov },
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[0xbf] = { DstReg|SrcMem16|ModRM|Mov },
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[0xc0] = { ByteOp|DstMem|SrcReg|ModRM },
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[0xc1] = { DstMem|SrcReg|ModRM },
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[0xc2] = { SrcImmByte|ModRM },
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[0xc3] = { DstMem|SrcReg|ModRM|Mov },
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[0xc4 ... 0xc6] = { SrcImmByte|ModRM },
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[0xc7] = { ImplicitOps|ModRM },
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[0xc8 ... 0xcf] = { ImplicitOps },
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[0xd0 ... 0xd5] = { ModRM },
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[0xd6] = { ImplicitOps|ModRM },
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[0xd7 ... 0xdf] = { ModRM },
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[0xe0 ... 0xe6] = { ModRM },
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[0xe7] = { ImplicitOps|ModRM },
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[0xe8 ... 0xef] = { ModRM },
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[0xf0 ... 0xff] = { ModRM }
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};
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static const opcode_desc_t xop_table[] = {
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@@ -2230,7 +2208,7 @@ x86_decode(
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{
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/* Two-byte opcode. */
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b = insn_fetch_type(uint8_t);
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d = twobyte_table[b];
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d = twobyte_table[b].desc;
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switch ( b )
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{
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default:
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@@ -2341,15 +2319,15 @@ x86_decode(
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{
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case vex_0f:
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opcode |= MASK_INSR(0x0f, X86EMUL_OPC_EXT_MASK);
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d = twobyte_table[b];
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d = twobyte_table[b].desc;
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break;
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case vex_0f38:
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opcode |= MASK_INSR(0x0f38, X86EMUL_OPC_EXT_MASK);
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d = twobyte_table[0x38];
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d = twobyte_table[0x38].desc;
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break;
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case vex_0f3a:
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opcode |= MASK_INSR(0x0f3a, X86EMUL_OPC_EXT_MASK);
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d = twobyte_table[0x3a];
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d = twobyte_table[0x3a].desc;
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break;
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default:
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rc = X86EMUL_UNHANDLEABLE;
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