x86/spec-ctrl: Rename SCF_ist_wrmsr to SCF_ist_sc_msr

We are about to introduce SCF_ist_ibpb, at which point SCF_ist_wrmsr becomes
ambiguous.

No functional change.

This is part of XSA-407.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit 76d6a36f64)
This commit is contained in:
Andrew Cooper committed 2022-07-12 16:28:26 +01:00
1 parent 156ab77576
commit 2cfbca32b9
3 files changed
+9 -9

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+3 -3
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@@ -1086,7 +1086,7 @@ void __init init_speculation_mitigations(void)
{
if ( opt_msr_sc_pv )
{
default_spec_ctrl_flags |= SCF_ist_wrmsr;
default_spec_ctrl_flags |= SCF_ist_sc_msr;
setup_force_cpu_cap(X86_FEATURE_SC_MSR_PV);
}
@@ -1097,7 +1097,7 @@ void __init init_speculation_mitigations(void)
* Xen's value is not restored atomically. An early NMI hitting
* the VMExit path needs to restore Xen's value for safety.
*/
default_spec_ctrl_flags |= SCF_ist_wrmsr;
default_spec_ctrl_flags |= SCF_ist_sc_msr;
setup_force_cpu_cap(X86_FEATURE_SC_MSR_HVM);
}
}
@@ -1110,7 +1110,7 @@ void __init init_speculation_mitigations(void)
* on real hardware matches the availability of MSR_SPEC_CTRL in the
* first place.
*
* No need for SCF_ist_wrmsr because Xen's value is restored
* No need for SCF_ist_sc_msr because Xen's value is restored
* atomically WRT NMIs in the VMExit path.
*
* TODO: Adjust cpu_has_svm_spec_ctrl to be usable earlier on boot.
+2 -2
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@@ -31,7 +31,7 @@
* context switched per domain, and some inhibited in the S3 path.
*/
#define SCF_use_shadow (1 << 0)
#define SCF_ist_wrmsr (1 << 1)
#define SCF_ist_sc_msr (1 << 1)
#define SCF_ist_rsb (1 << 2)
#define SCF_verw (1 << 3)
@@ -46,7 +46,7 @@
* These are the controls to inhibit on the S3 resume path until microcode has
* been reloaded.
*/
#define SCF_IST_MASK (SCF_ist_wrmsr)
#define SCF_IST_MASK (SCF_ist_sc_msr)
/*
* Some speculative protections are per-domain. These settings are merged
+4 -4
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@@ -266,8 +266,8 @@
.L\@_skip_rsb:
test $SCF_ist_wrmsr, %al
jz .L\@_skip_wrmsr
test $SCF_ist_sc_msr, %al
jz .L\@_skip_msr_spec_ctrl
xor %edx, %edx
testb $3, UREGS_cs(%rsp)
@@ -290,7 +290,7 @@ UNLIKELY_DISPATCH_LABEL(\@_serialise):
* to speculate around the WRMSR. As a result, we need a dispatch
* serialising instruction in the else clause.
*/
.L\@_skip_wrmsr:
.L\@_skip_msr_spec_ctrl:
lfence
UNLIKELY_END(\@_serialise)
.endm
@@ -301,7 +301,7 @@ UNLIKELY_DISPATCH_LABEL(\@_serialise):
* Requires %rbx=stack_end
* Clobbers %rax, %rcx, %rdx
*/
testb $SCF_ist_wrmsr, STACK_CPUINFO_FIELD(spec_ctrl_flags)(%rbx)
testb $SCF_ist_sc_msr, STACK_CPUINFO_FIELD(spec_ctrl_flags)(%rbx)
jz .L\@_skip
DO_SPEC_CTRL_EXIT_TO_XEN
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