x86emul: correct far branch handling for 64-bit mode

AMD and friends explicitly specify that 64-bit operands aren't possible
for these insns. Nevertheless REX.W isn't fully ignored: It still
cancels a possible operand size override (0x66). Intel otoh explicitly
provides for 64-bit operands on the respective insn page of the SDM.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
Jan Beulich committed 2019-12-16 17:37:09 +01:00
1 parent 787bda8eb8
commit 2d696d6145
1 file changed
+8 -1
+8 -1
View File
@@ -2519,9 +2519,16 @@ x86_decode_onebyte(
case 6: /* push */
if ( mode_64bit() && op_bytes == 4 )
op_bytes = 8;
/* fall through */
state->desc = DstNone | SrcMem | Mov;
break;
case 3: /* call (far, absolute indirect) */
case 5: /* jmp (far, absolute indirect) */
/* REX.W ignored on a vendor-dependent basis. */
if ( op_bytes == 8 &&
(ctxt->cpuid->x86_vendor &
(X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
op_bytes = 4;
state->desc = DstNone | SrcMem | Mov;
break;
}
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