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x86: introduce x86_seg_sys
To represent the USER-MSR bitmap access, a new segment type needs introducing, behaving like x86_seg_none in terms of address treatment, but behaving like a system segment for page walk purposes (implicit supervisor-mode access). While there also add x86_seg_none handling to the test harness'es read() hook, as will be needed for MSR-LIST support. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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@@ -593,6 +593,8 @@ static int read(
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default:
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if ( !is_x86_user_segment(seg) )
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return X86EMUL_UNHANDLEABLE;
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case x86_seg_sys:
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case x86_seg_none:
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bytes_read += bytes;
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break;
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}
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@@ -840,7 +840,7 @@ static int hvmemul_virtual_to_linear(
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int okay;
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unsigned long reps = 1;
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if ( seg == x86_seg_none )
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if ( seg == x86_seg_none || seg == x86_seg_sys )
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{
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*linear = offset;
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return X86EMUL_OKAY;
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@@ -2599,7 +2599,7 @@ bool hvm_vcpu_virtual_to_linear(
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* It is expected that the access rights of reg are suitable for seg (and
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* that this is enforced at the point that seg is loaded).
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*/
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ASSERT(seg < x86_seg_none);
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ASSERT(seg < x86_seg_sys);
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/* However, check that insn fetches only ever specify CS. */
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ASSERT(access_type != hvm_access_insn_fetch || seg == x86_seg_cs);
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@@ -749,6 +749,7 @@ static void cf_check svm_set_segment_register(
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vmcb->ldtr = *reg;
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break;
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case x86_seg_sys:
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case x86_seg_none:
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ASSERT_UNREACHABLE();
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break;
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@@ -43,7 +43,8 @@ enum x86_segment {
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x86_seg_ldtr,
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x86_seg_gdtr,
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x86_seg_idtr,
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/* No Segment: For accesses which are already linear. */
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/* No Segment: For (system/normal) accesses which are already linear. */
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x86_seg_sys,
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x86_seg_none
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};
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