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xen/compiler: Rename __attribute_const__ to attr_const
There's no need for the name to be so verbose. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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Andrew Cooper committed
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6 files changed
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@@ -22,7 +22,7 @@ typedef uint16_t __be16;
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typedef uint32_t __be32;
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typedef uint64_t __be64;
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#define __attribute_const__
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#define attr_const
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#define __force
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#define always_inline
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#define noinline
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@@ -44,25 +44,25 @@ struct arm64_ftr_bits {
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s64 safe_val; /* safe value for FTR_EXACT features */
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};
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static inline int __attribute_const__
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static inline int attr_const
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cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
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{
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return (s64)(features << (64 - width - field)) >> (64 - width);
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}
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static inline int __attribute_const__
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static inline int attr_const
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cpuid_feature_extract_signed_field(u64 features, int field)
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{
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return cpuid_feature_extract_signed_field_width(features, field, 4);
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}
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static inline unsigned int __attribute_const__
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static inline unsigned int attr_const
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cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
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{
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return (u64)(features << (64 - width - field)) >> (64 - width);
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}
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static inline unsigned int __attribute_const__
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static inline unsigned int attr_const
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cpuid_feature_extract_unsigned_field(u64 features, int field)
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{
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return cpuid_feature_extract_unsigned_field_width(features, field, 4);
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@@ -73,7 +73,7 @@ static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp)
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return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
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}
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static inline int __attribute_const__
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static inline int attr_const
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cpuid_feature_extract_field_width(u64 features, int field, int width, bool sign)
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{
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return (sign) ?
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@@ -81,7 +81,7 @@ cpuid_feature_extract_field_width(u64 features, int field, int width, bool sign)
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cpuid_feature_extract_unsigned_field_width(features, field, width);
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}
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static inline int __attribute_const__
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static inline int attr_const
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cpuid_feature_extract_field(u64 features, int field, bool sign)
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{
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return cpuid_feature_extract_field_width(features, field, 4, sign);
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@@ -4,13 +4,13 @@
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#include <xen/types.h>
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#include <xen/compiler.h>
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static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
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static inline attr_const __u32 ___arch__swab32(__u32 x)
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{
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asm("bswap %0" : "=r" (x) : "0" (x));
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return x;
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}
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static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
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static inline attr_const __u64 ___arch__swab64(__u64 val)
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{
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union {
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struct { __u32 a,b; } s;
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@@ -19,7 +19,7 @@
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* gen_endbr64() is written deliberately to avoid the problematic operand, and
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* marked __const__ as it is safe for the optimiser to hoist/merge/etc.
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*/
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static inline uint32_t __attribute_const__ gen_endbr64(void)
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static inline uint32_t attr_const gen_endbr64(void)
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{
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uint32_t res;
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@@ -45,7 +45,7 @@ static inline void place_endbr64(void *ptr)
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* contain an ENDBR64 instruction. Use an encoding which isn't the default
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* P6_NOP4. Specifically, nopw (%rcx)
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*/
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static inline uint32_t __attribute_const__ gen_endbr64_poison(void)
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static inline uint32_t attr_const gen_endbr64_poison(void)
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{
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uint32_t res;
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@@ -123,7 +123,7 @@
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#endif /* OPTIMIZE */
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static inline __attribute_const__ __u16 __fswab16(__u16 x)
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static inline attr_const __u16 __fswab16(__u16 x)
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{
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return __arch__swab16(x);
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}
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@@ -136,7 +136,7 @@ static inline void __swab16s(__u16 *addr)
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__arch__swab16s(addr);
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}
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static inline __attribute_const__ __u32 __fswab32(__u32 x)
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static inline attr_const __u32 __fswab32(__u32 x)
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{
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return __arch__swab32(x);
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}
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@@ -150,7 +150,7 @@ static inline void __swab32s(__u32 *addr)
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}
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#ifdef __BYTEORDER_HAS_U64__
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static inline __attribute_const__ __u64 __fswab64(__u64 x)
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static inline attr_const __u64 __fswab64(__u64 x)
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{
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# ifdef __SWAB_64_THRU_32__
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__u32 h = x >> 32;
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@@ -88,7 +88,7 @@
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#define __constructor __attribute__((__constructor__)) cf_check
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#define __pure __attribute__((__pure__))
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#define __attribute_const__ __attribute__((__const__))
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#define attr_const __attribute__((__const__))
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#define __transparent__ __attribute__((__transparent_union__))
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/*
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