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xen/arm: gic-v3: Make sure read from ICC_IAR1_EL1 is visible on the redistributor
"The effects of reading ICC_IAR0_EL1 and ICC_IAR1_EL1 on the state of a returned INTID are not guaranteed to be visible until after the execution of a DSB". Because of the GIC is an external component, a dsb sy is required. Without it the sysreg read may not have been made visible on the redistributor. Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
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@@ -455,7 +455,11 @@ static void gicv3_dir_irq(struct irq_desc *irqd)
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static unsigned int gicv3_read_irq(void)
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{
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return READ_SYSREG32(ICC_IAR1_EL1);
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unsigned int irq = READ_SYSREG32(ICC_IAR1_EL1);
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dsb(sy);
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return irq;
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}
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static inline uint64_t gicv3_mpidr_to_affinity(int cpu)
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