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xen: Fix up use of trap_bounce structure.

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Fixes suggested by Jan Beulich.
Signed-off-by: Keir Fraser <keir@xensource.com>
This commit is contained in:
kfraser@localhost.localdomain committed 2007-04-25 13:50:20 +01:00
1 parent 2752e8f063
commit 429a365771
5 files changed
+28 -32
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xen/arch/x86/x86_32/entry.S
+6 -5
View File
@@ -75,6 +75,7 @@
ALIGN
restore_all_guest:
ASSERT_INTERRUPTS_DISABLED
testl $X86_EFLAGS_VM,UREGS_eflags(%esp)
jnz restore_all_vm86
#ifdef CONFIG_X86_SUPERVISOR_MODE_KERNEL
@@ -129,10 +130,10 @@ failsafe_callback:
movl %eax,TRAPBOUNCE_eip(%edx)
movl VCPU_failsafe_sel(%ebx),%eax
movw %ax,TRAPBOUNCE_cs(%edx)
movw $TBF_FAILSAFE,TRAPBOUNCE_flags(%edx)
movb $TBF_FAILSAFE,TRAPBOUNCE_flags(%edx)
bt $_VGCF_failsafe_disables_events,VCPU_guest_context_flags(%ebx)
jnc 1f
orw $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
orb $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
1: call create_bounce_frame
xorl %eax,%eax
movl %eax,UREGS_ds(%esp)
@@ -247,7 +248,7 @@ test_guest_events:
movl %eax,TRAPBOUNCE_eip(%edx)
movl VCPU_event_sel(%ebx),%eax
movw %ax,TRAPBOUNCE_cs(%edx)
movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
call create_bounce_frame
jmp test_all_events
@@ -270,7 +271,7 @@ process_nmi:
leal VCPU_trap_bounce(%ebx),%edx
movl %eax,TRAPBOUNCE_eip(%edx)
movw $FLAT_KERNEL_CS,TRAPBOUNCE_cs(%edx)
movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
call create_bounce_frame
jmp test_all_events
@@ -383,7 +384,6 @@ ring1: /* obtain ss/esp from oldss/oldesp -- a ring-1 activation exists */
movl %eax,UREGS_cs+4(%esp)
movl TRAPBOUNCE_eip(%edx),%eax
movl %eax,UREGS_eip+4(%esp)
movb $0,TRAPBOUNCE_flags(%edx)
ret
.section __ex_table,"a"
.long .Lft6,domain_crash_synchronous , .Lft7,domain_crash_synchronous
@@ -441,6 +441,7 @@ handle_exception:
testb $TBF_EXCEPTION,TRAPBOUNCE_flags(%edx)
jz test_all_events
call create_bounce_frame
movb $0,TRAPBOUNCE_flags(%edx)
jmp test_all_events
exception_with_ints_disabled:
xen/arch/x86/x86_64/compat/entry.S
+7 -9
View File
@@ -102,7 +102,7 @@ compat_test_guest_events:
movl %eax,TRAPBOUNCE_eip(%rdx)
movl VCPU_event_sel(%rbx),%eax
movl %eax,TRAPBOUNCE_cs(%rdx)
movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
call compat_create_bounce_frame
jmp compat_test_all_events
@@ -127,7 +127,7 @@ compat_process_nmi:
leaq VCPU_trap_bounce(%rbx),%rdx
movl %eax,TRAPBOUNCE_eip(%rdx)
movl $FLAT_COMPAT_KERNEL_CS,TRAPBOUNCE_cs(%rdx)
movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
call compat_create_bounce_frame
jmp compat_test_all_events
@@ -165,12 +165,11 @@ compat_failsafe_callback:
movl %eax,TRAPBOUNCE_eip(%rdx)
movl VCPU_failsafe_sel(%rbx),%eax
movl %eax,TRAPBOUNCE_cs(%rdx)
movw $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
movb $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
btq $_VGCF_failsafe_disables_events,VCPU_guest_context_flags(%rbx)
jnc 1f
orw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
1:
call compat_create_bounce_frame
orb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
1: call compat_create_bounce_frame
jmp compat_test_all_events
.previous
.section __pre_ex_table,"a"
@@ -185,6 +184,7 @@ ENTRY(compat_post_handle_exception)
testb $TBF_EXCEPTION,TRAPBOUNCE_flags(%rdx)
jz compat_test_all_events
call compat_create_bounce_frame
movb $0,TRAPBOUNCE_flags(%rdx)
jmp compat_test_all_events
ENTRY(compat_int80_direct_trap)
@@ -194,7 +194,7 @@ ENTRY(compat_int80_direct_trap)
/* CREATE A BASIC EXCEPTION FRAME ON GUEST OS (RING-1) STACK: */
/* {[ERRCODE,] EIP, CS, EFLAGS, [ESP, SS]} */
/* %rdx: trap_bounce, %rbx: struct vcpu */
/* On return only %rbx is guaranteed non-clobbered. */
/* On return only %rbx and %rdx are guaranteed non-clobbered. */
compat_create_bounce_frame:
ASSERT_INTERRUPTS_ENABLED
mov %fs,%edi
@@ -253,7 +253,6 @@ compat_create_bounce_frame:
2:
/* Rewrite our stack frame and return to guest-OS mode. */
/* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
movl $TRAP_syscall,UREGS_entry_vector+8(%rsp)
andl $~(X86_EFLAGS_VM|X86_EFLAGS_RF|\
X86_EFLAGS_NT|X86_EFLAGS_TF),UREGS_eflags+8(%rsp)
mov %fs,UREGS_ss+8(%rsp)
@@ -266,7 +265,6 @@ compat_create_bounce_frame:
movl %eax,UREGS_cs+8(%rsp)
movl TRAPBOUNCE_eip(%rdx),%eax
movl %eax,UREGS_rip+8(%rsp)
movb $0,TRAPBOUNCE_flags(%rdx)
ret
.section .fixup,"ax"
.Lfx13:
xen/arch/x86/x86_64/entry.S
+11 -11
View File
@@ -29,10 +29,10 @@ switch_to_kernel:
leaq VCPU_trap_bounce(%rbx),%rdx
movq VCPU_syscall_addr(%rbx),%rax
movq %rax,TRAPBOUNCE_eip(%rdx)
movw $0,TRAPBOUNCE_flags(%rdx)
movb $0,TRAPBOUNCE_flags(%rdx)
bt $_VGCF_syscall_disables_events,VCPU_guest_context_flags(%rbx)
jnc 1f
orw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
1: call create_bounce_frame
jmp test_all_events
@@ -80,10 +80,10 @@ failsafe_callback:
leaq VCPU_trap_bounce(%rbx),%rdx
movq VCPU_failsafe_addr(%rbx),%rax
movq %rax,TRAPBOUNCE_eip(%rdx)
movw $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
movb $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
bt $_VGCF_failsafe_disables_events,VCPU_guest_context_flags(%rbx)
jnc 1f
orw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
orb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
1: call create_bounce_frame
jmp test_all_events
.previous
@@ -191,7 +191,7 @@ test_guest_events:
leaq VCPU_trap_bounce(%rbx),%rdx
movq VCPU_event_addr(%rbx),%rax
movq %rax,TRAPBOUNCE_eip(%rdx)
movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
call create_bounce_frame
jmp test_all_events
@@ -215,7 +215,7 @@ process_nmi:
sti
leaq VCPU_trap_bounce(%rbx),%rdx
movq %rax,TRAPBOUNCE_eip(%rdx)
movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
call create_bounce_frame
jmp test_all_events
@@ -231,7 +231,7 @@ ENTRY(int80_direct_trap)
/* Check that the callback is non-null. */
leaq VCPU_int80_bounce(%rbx),%rdx
cmp $0,TRAPBOUNCE_flags(%rdx)
cmpb $0,TRAPBOUNCE_flags(%rdx)
jz int80_slow_path
movq VCPU_domain(%rbx),%rax
@@ -249,13 +249,13 @@ int80_slow_path:
movl $((0x80 << 3) | 0x2),UREGS_error_code(%rsp)
movl $TRAP_gp_fault,UREGS_entry_vector(%rsp)
/* A GPF wouldn't have incremented the instruction pointer. */
sub $2,UREGS_rip(%rsp)
subq $2,UREGS_rip(%rsp)
jmp handle_exception_saved
/* CREATE A BASIC EXCEPTION FRAME ON GUEST OS STACK: */
/* { RCX, R11, [DS-GS,] [CR2,] [ERRCODE,] RIP, CS, RFLAGS, RSP, SS } */
/* %rdx: trap_bounce, %rbx: struct vcpu */
/* On return only %rbx is guaranteed non-clobbered. */
/* %rdx: trap_bounce, %rbx: struct vcpu */
/* On return only %rbx and %rdx are guaranteed non-clobbered. */
create_bounce_frame:
ASSERT_INTERRUPTS_ENABLED
testb $TF_kernel_mode,VCPU_thread_flags(%rbx)
@@ -336,7 +336,6 @@ create_bounce_frame:
testq %rax,%rax
jz domain_crash_synchronous
movq %rax,UREGS_rip+8(%rsp)
movb $0,TRAPBOUNCE_flags(%rdx)
ret
.section __ex_table,"a"
.quad .Lft2,domain_crash_synchronous , .Lft3,domain_crash_synchronous
@@ -401,6 +400,7 @@ handle_exception_saved:
testb $TBF_EXCEPTION,TRAPBOUNCE_flags(%rdx)
jz test_all_events
call create_bounce_frame
movb $0,TRAPBOUNCE_flags(%rdx)
jmp test_all_events
/* No special register assumptions. */
xen/arch/x86/x86_64/traps.c
-3
View File
@@ -357,9 +357,6 @@ void init_int80_direct_trap(struct vcpu *v)
struct trap_info *ti = &v->arch.guest_context.trap_ctxt[0x80];
struct trap_bounce *tb = &v->arch.int80_bounce;
if ( !guest_gate_selector_okay(v->domain, ti->cs) )
return;
tb->flags = TBF_EXCEPTION;
tb->cs = ti->cs;
tb->eip = ti->address;
xen/include/asm-x86/domain.h
+4 -4
View File
@@ -8,10 +8,10 @@
#include <asm/e820.h>
struct trap_bounce {
unsigned long error_code;
unsigned short flags; /* TBF_ */
unsigned short cs;
unsigned long eip;
uint32_t error_code;
uint8_t flags; /* TBF_ */
uint16_t cs;
unsigned long eip;
};
#define MAPHASH_ENTRIES 8
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