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x86/S3: Drop {save,restore}_rest_processor_state() completely
There is no need to save/restore FS/GS/XCR0 state. It will be handled suitably on the context switch away from the idle. The CR4 restoration in restore_rest_processor_state() was actually fighting later code in enter_state() which tried to keep CR4.MCE clear until everything was set up. Delete the intermediate restoration, and defer final restoration until after MCE is reconfigured. Restoring PAT can be done earlier, and ideally before paging is enabled. By moving it into the trampoline during the setup for 64bit, the call can be dropped from cpu_init(). The EFI path boot path doesn't disable paging, so make the adjustment when switching onto Xen's pagetables. The only remaing piece of restoration is load_system_tables(), so suspend.c can be deleted in its entirety. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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Andrew Cooper committed
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@@ -1,4 +1,4 @@
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obj-y += cpufreq/
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obj-y += lib.o power.o suspend.o cpu_idle.o cpuidle_menu.o
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obj-y += lib.o power.o cpu_idle.o cpuidle_menu.o
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obj-bin-y += boot.init.o wakeup_prot.o
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@@ -195,7 +195,6 @@ static int enter_state(u32 state)
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unsigned long flags;
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int error;
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struct cpu_info *ci;
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unsigned long cr4;
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if ( (state <= ACPI_STATE_S0) || (state > ACPI_S_STATES_MAX) )
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return -EINVAL;
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@@ -270,15 +269,15 @@ static int enter_state(u32 state)
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system_state = SYS_STATE_resume;
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/* Restore CR4 and EFER from cached values. */
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cr4 = read_cr4();
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write_cr4(cr4 & ~X86_CR4_MCE);
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/* Restore EFER from cached value. */
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write_efer(read_efer());
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device_power_up(SAVED_ALL);
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mcheck_init(&boot_cpu_data, false);
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write_cr4(cr4);
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/* Restore CR4 from cached value, now MCE is set up. */
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write_cr4(read_cr4());
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printk(XENLOG_INFO "Finishing wakeup from ACPI S%d state.\n", state);
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@@ -1,49 +0,0 @@
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/*
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* Portions are:
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* Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
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* Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
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*/
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#include <xen/acpi.h>
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#include <xen/smp.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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#include <asm/debugreg.h>
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#include <asm/hvm/hvm.h>
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#include <asm/hvm/support.h>
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#include <asm/i387.h>
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#include <asm/xstate.h>
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#include <xen/hypercall.h>
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static unsigned long saved_fs_base, saved_gs_base, saved_kernel_gs_base;
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static uint64_t saved_xcr0;
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void save_rest_processor_state(void)
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{
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saved_fs_base = rdfsbase();
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saved_gs_base = rdgsbase();
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rdmsrl(MSR_SHADOW_GS_BASE, saved_kernel_gs_base);
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if ( cpu_has_xsave )
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saved_xcr0 = get_xcr0();
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}
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void restore_rest_processor_state(void)
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{
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load_system_tables();
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/* Restore full CR4 (inc MCE) now that the IDT is in place. */
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write_cr4(mmu_cr4_features);
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wrfsbase(saved_fs_base);
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wrgsbase(saved_gs_base);
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wrmsrl(MSR_SHADOW_GS_BASE, saved_kernel_gs_base);
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if ( cpu_has_xsave && !set_xcr0(saved_xcr0) )
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BUG();
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wrmsrl(MSR_IA32_CR_PAT, XEN_MSR_PAT);
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mtrr_bp_restore();
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}
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@@ -15,8 +15,6 @@ ENTRY(do_suspend_lowlevel)
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mov %cr0, %rax
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mov %rax, saved_cr0(%rip)
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call save_rest_processor_state
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/* enter sleep state physically */
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mov $3, %edi
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call acpi_enter_sleep_state
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@@ -51,7 +49,7 @@ ENTRY(s3_resume)
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lretq
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1:
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call restore_rest_processor_state
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call load_system_tables
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.Lsuspend_err:
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pop %r15
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@@ -91,6 +91,11 @@ trampoline_protmode_entry:
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and %edi,%edx
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wrmsr
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1:
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/* Set up PAT before enabling paging. */
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mov $XEN_MSR_PAT & 0xffffffff, %eax
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mov $XEN_MSR_PAT >> 32, %edx
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mov $MSR_IA32_CR_PAT, %ecx
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wrmsr
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/* Set up EFER (Extended Feature Enable Register). */
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movl $MSR_EFER,%ecx
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@@ -790,8 +790,6 @@ void cpu_init(void)
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if (opt_cpu_info)
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printk("Initializing CPU#%d\n", cpu);
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wrmsrl(MSR_IA32_CR_PAT, XEN_MSR_PAT);
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/* Install correct page table. */
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write_ptbase(current);
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@@ -242,6 +242,7 @@ static void __init noreturn efi_arch_post_exit_boot(void)
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if ( cpu_has_nx )
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efer |= EFER_NX;
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wrmsrl(MSR_EFER, efer);
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wrmsrl(MSR_IA32_CR_PAT, XEN_MSR_PAT);
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write_cr0(X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP |
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X86_CR0_AM | X86_CR0_PG);
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asm volatile ( "mov %[cr4], %%cr4\n\t"
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