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x86/cpuid: replace more cpufeat_word() uses
Complete what e3662437eb ("x86/cpuid: Disentangle logic for new
feature leaves") has begun:
"Switch to using FEATURESET_* just like the policy/featureset helpers. This
breaks the cognitive complexity of needing to know which leaf a specifically
named feature should reside in, and is shorter to write. It is also far
easier to identify as correct at a glance, given the correlation with the
CPUID leaf being read."
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
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73ba368e76
commit
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4 files changed
+12
-13
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@@ -332,24 +332,23 @@ void __init early_cpu_init(void)
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cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
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c->x86 = get_cpu_family(eax, &c->x86_model, &c->x86_mask);
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edx &= ~cleared_caps[cpufeat_word(X86_FEATURE_FPU)];
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ecx &= ~cleared_caps[cpufeat_word(X86_FEATURE_SSE3)];
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edx &= ~cleared_caps[FEATURESET_1d];
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ecx &= ~cleared_caps[FEATURESET_1c];
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if (edx & cpufeat_mask(X86_FEATURE_CLFLUSH))
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c->x86_cache_alignment = ((ebx >> 8) & 0xff) * 8;
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/* Leaf 0x1 capabilities filled in early for Xen. */
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c->x86_capability[cpufeat_word(X86_FEATURE_FPU)] = edx;
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c->x86_capability[cpufeat_word(X86_FEATURE_SSE3)] = ecx;
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c->x86_capability[FEATURESET_1d] = edx;
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c->x86_capability[FEATURESET_1c] = ecx;
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printk(XENLOG_INFO
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"CPU Vendor: %s, Family %u (%#x), Model %u (%#x), Stepping %u (raw %08x)\n",
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x86_cpuid_vendor_to_str(c->x86_vendor), c->x86, c->x86,
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c->x86_model, c->x86_model, c->x86_mask, eax);
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if (c->cpuid_level >= 7) {
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cpuid_count(7, 0, &eax, &ebx, &ecx, &edx);
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c->x86_capability[cpufeat_word(X86_FEATURE_CET_SS)] = ecx;
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c->x86_capability[cpufeat_word(X86_FEATURE_CET_IBT)] = edx;
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}
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if (c->cpuid_level >= 7)
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cpuid_count(7, 0, &eax, &ebx,
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&c->x86_capability[FEATURESET_7c0],
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&c->x86_capability[FEATURESET_7d0]);
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eax = cpuid_eax(0x80000000);
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if ((eax >> 16) == 0x8000 && eax >= 0x80000008) {
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@@ -685,11 +685,11 @@ static void __init efi_arch_cpu(void)
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boot_tsc_stamp = rdtsc();
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caps[cpufeat_word(X86_FEATURE_HYPERVISOR)] = cpuid_ecx(1);
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caps[FEATURESET_1c] = cpuid_ecx(1);
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if ( (eax >> 16) == 0x8000 && eax > 0x80000000 )
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{
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caps[cpufeat_word(X86_FEATURE_SYSCALL)] = cpuid_edx(0x80000001);
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caps[FEATURESET_e1d] = cpuid_edx(0x80000001);
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if ( cpu_has_nx )
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trampoline_efer |= EFER_NXE;
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@@ -516,7 +516,7 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type)
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(boot_cpu_data.x86_model << 4) |
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boot_cpu_data.x86_mask;
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processor.mpc_featureflag =
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boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_FPU)];
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boot_cpu_data.x86_capability[FEATURESET_1d];
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processor.mpc_reserved[0] = 0;
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processor.mpc_reserved[1] = 0;
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for (i = 0; i < 2; i++) {
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+1
-1
@@ -48,7 +48,7 @@ void tsx_init(void)
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bool has_rtm_always_abort;
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if ( boot_cpu_data.cpuid_level >= 7 )
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boot_cpu_data.x86_capability[cpufeat_word(X86_FEATURE_ARCH_CAPS)]
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boot_cpu_data.x86_capability[FEATURESET_7d0]
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= cpuid_count_edx(7, 0);
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if ( cpu_has_arch_caps )
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