AMD/IOMMU: consider hidden devices when flushing device I/O TLBs

Hidden devices are associated with DomXEN but usable by the
hardware domain. Hence they need flushing as well when all devices are
to have flushes invoked.

While there drop a redundant ATS-enabled check and constify the first
parameter of the involved function.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul@xen.org>
master commit: 036432e8b2
master date: 2021-10-12 11:54:34 +0200
This commit is contained in:
Jan Beulich committed 2021-10-15 11:19:41 +02:00
1 parent 37ea2893e9
commit 49b0aef3f9
1 file changed
+10 -4
+10 -4
View File
@@ -309,14 +309,11 @@ void amd_iommu_flush_iotlb(u8 devfn, const struct pci_dev *pdev,
spin_unlock_irqrestore(&iommu->lock, flags);
}
static void amd_iommu_flush_all_iotlbs(struct domain *d, daddr_t daddr,
static void amd_iommu_flush_all_iotlbs(const struct domain *d, daddr_t daddr,
unsigned int order)
{
struct pci_dev *pdev;
if ( !ats_enabled )
return;
for_each_pdev( d, pdev )
{
u8 devfn = pdev->devfn;
@@ -347,7 +344,16 @@ static void _amd_iommu_flush_pages(struct domain *d,
}
if ( ats_enabled )
{
amd_iommu_flush_all_iotlbs(d, daddr, order);
/*
* Hidden devices are associated with DomXEN but usable by the
* hardware domain. Hence they need dealing with here as well.
*/
if ( is_hardware_domain(d) )
amd_iommu_flush_all_iotlbs(dom_xen, daddr, order);
}
}
void amd_iommu_flush_all_pages(struct domain *d)
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