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drivers: Remove some CONFIG_X86 ifdef'ery.
Not quite all, but a great deal was to specifically allow ia64 support to be retrofitted to x86 platform code. Since we no longer support ia64 we can happily remove the ifdefs. Any new platform which wanted to share this code would likely need a different set of ifdefs in any case, making it a brand new porting effort. Signed-off-by: Keir Fraser <keir@xen.org>
This commit is contained in:
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a9c02a0d88
commit
4e11d97bd9
12 files changed
+3
-134
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@@ -121,16 +121,6 @@ static int __init acpi_parse_slit(struct acpi_table_header *table)
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return 0;
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}
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#ifndef CONFIG_X86
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void __init
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acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa)
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{
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printk(KERN_WARNING PREFIX
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"Found unsupported x2apic [0x%08x] SRAT entry\n", pa->apic_id);
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return;
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}
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#endif
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static int __init
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acpi_parse_x2apic_affinity(struct acpi_subtable_header *header,
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const unsigned long end)
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@@ -134,7 +134,6 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op)
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break;
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}
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#ifdef CONFIG_X86
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case PMSTAT_get_max_cx:
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{
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op->u.getcx.nr = pmstat_get_cx_nr(op->cpuid);
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@@ -153,7 +152,6 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op)
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ret = pmstat_reset_cx_stat(op->cpuid);
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break;
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}
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#endif
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default:
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printk("not defined sub-hypercall @ do_get_pm_info\n");
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@@ -481,8 +481,7 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *dom0_px_in
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if ( dom0_px_info->flags & XEN_PX_PSD )
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{
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#ifdef CONFIG_X86
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/* for X86, check domain coordination */
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/* check domain coordination */
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if (dom0_px_info->shared_type != CPUFREQ_SHARED_TYPE_ALL &&
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dom0_px_info->shared_type != CPUFREQ_SHARED_TYPE_ANY &&
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dom0_px_info->shared_type != CPUFREQ_SHARED_TYPE_HW)
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@@ -490,7 +489,6 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *dom0_px_in
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ret = -EINVAL;
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goto out;
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}
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#endif
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pxpt->shared_type = dom0_px_info->shared_type;
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memcpy ((void *)&pxpt->domain_info,
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@@ -26,8 +26,6 @@ struct pci_ats_dev {
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u16 ats_queue_depth; /* ATS device invalidation queue depth */
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};
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#ifdef CONFIG_X86
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#define ATS_REG_CAP 4
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#define ATS_REG_CTL 6
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#define ATS_QUEUE_DEPTH_MASK 0xF
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@@ -61,36 +59,5 @@ static inline int pci_ats_device(int seg, int bus, int devfn)
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return pci_find_ext_capability(seg, bus, devfn, PCI_EXT_CAP_ID_ATS);
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}
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#else
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#define ats_enabled 0
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static inline int enable_ats_device(int seg, int bus, int devfn)
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{
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BUG();
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return -ENOSYS;
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}
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static inline void disable_ats_device(int seg, int bus, int devfn)
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{
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BUG();
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}
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static inline int pci_ats_enabled(int seg, int bus, int devfn)
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{
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return 0;
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}
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static inline int pci_ats_device(int seg, int bus, int devfn)
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{
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return 0;
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}
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static inline struct pci_ats_dev *get_ats_device(int seg, int bus, int devfn)
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{
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return NULL;
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}
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#endif
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#endif /* _ATS_H_ */
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@@ -29,9 +29,7 @@
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#include <xen/radix-tree.h>
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#include <xen/tasklet.h>
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#include <xsm/xsm.h>
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#ifdef CONFIG_X86
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#include <asm/msi.h>
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#endif
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struct pci_seg {
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struct list_head alldevs_list;
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@@ -520,7 +520,6 @@ acpi_parse_one_rmrr(struct acpi_dmar_header *header)
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if ( (ret = acpi_dmar_check_length(header, sizeof(*rmrr))) != 0 )
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return ret;
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#ifdef CONFIG_X86
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/* This check is here simply to detect when RMRR values are
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* not properly represented in the system memory map and
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* inform the user
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@@ -534,7 +533,6 @@ acpi_parse_one_rmrr(struct acpi_dmar_header *header)
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"iommu_inclusive_mapping=1 parameter may be needed.\n",
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base_addr, end_addr);
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}
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#endif
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rmrru = xzalloc(struct acpi_rmrr_unit);
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if ( !rmrru )
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@@ -775,14 +773,10 @@ out:
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return ret;
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}
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#ifdef CONFIG_X86
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#include <asm/tboot.h>
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/* ACPI tables may not be DMA protected by tboot, so use DMAR copy */
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/* SINIT saved in SinitMleData in TXT heap (which is DMA protected) */
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#define parse_dmar_table(h) tboot_parse_dmar_table(h)
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#else
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#define parse_dmar_table(h) acpi_table_parse(ACPI_SIG_DMAR, h)
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#endif
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int __init acpi_dmar_init(void)
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{
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@@ -813,14 +807,8 @@ int platform_supports_intremap(void)
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return (dmar_flags & mask) == ACPI_DMAR_INTR_REMAP;
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}
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#ifdef CONFIG_X86
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int platform_supports_x2apic(void)
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{
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unsigned int mask = ACPI_DMAR_INTR_REMAP | ACPI_DMAR_X2APIC_OPT_OUT;
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if (!cpu_has_x2apic)
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return 0;
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return (dmar_flags & mask) == ACPI_DMAR_INTR_REMAP;
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return cpu_has_x2apic && ((dmar_flags & mask) == ACPI_DMAR_INTR_REMAP);
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}
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#endif
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@@ -56,32 +56,12 @@ struct acpi_drhd_unit * ioapic_to_drhd(unsigned int apic_id);
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struct acpi_drhd_unit * iommu_to_drhd(struct iommu *iommu);
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struct acpi_rhsa_unit * drhd_to_rhsa(struct acpi_drhd_unit *drhd);
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#ifdef CONFIG_X86
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struct acpi_drhd_unit * find_ats_dev_drhd(struct iommu *iommu);
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int ats_device(const struct pci_dev *, const struct acpi_drhd_unit *);
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int dev_invalidate_iotlb(struct iommu *iommu, u16 did,
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u64 addr, unsigned int size_order, u64 type);
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#else
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static inline struct acpi_drhd_unit *find_ats_dev_drhd(struct iommu *iommu)
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{
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return NULL;
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}
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static inline int ats_device(const struct pci_dev *pdev,
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const struct acpi_drhd_unit *drhd)
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{
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return 0;
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}
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static inline int dev_invalidate_iotlb(struct iommu *iommu, u16 did, u64 addr,
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unsigned int size_order, u64 type)
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{
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return 0;
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}
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#endif
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int qinval_device_iotlb(struct iommu *iommu,
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u32 max_invs_pend, u16 sid, u16 size, u64 addr);
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@@ -31,11 +31,9 @@
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#include "vtd.h"
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#include "extern.h"
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#if defined(CONFIG_X86)
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#define nr_ioapic_entries(i) nr_ioapic_entries[i]
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#endif
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/*
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* source validation type (SVT)
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@@ -302,12 +300,10 @@ static int ioapic_rte_to_remap_entry(struct iommu *iommu,
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if ( rte_upper )
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{
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#if defined(CONFIG_X86)
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if ( x2apic_enabled )
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new_ire.lo.dst = value;
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else
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new_ire.lo.dst = (value >> 24) << 8;
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#endif
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}
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else
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{
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@@ -316,12 +312,8 @@ static int ioapic_rte_to_remap_entry(struct iommu *iommu,
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new_ire.lo.dm = new_rte.dest_mode;
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new_ire.lo.tm = new_rte.trigger;
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new_ire.lo.dlm = new_rte.delivery_mode;
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#ifdef CONFIG_X86
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/* Hardware require RH = 1 for LPR delivery mode */
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new_ire.lo.rh = (new_ire.lo.dlm == dest_LowestPrio);
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#else
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new_ire.lo.rh = 0;
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#endif
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new_ire.lo.avail = 0;
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new_ire.lo.res_1 = 0;
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new_ire.lo.vector = new_rte.vector;
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@@ -422,8 +414,6 @@ void io_apic_write_remap_rte(
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__ioapic_write_entry(apic, ioapic_pin, 1, old_rte);
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}
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#if defined(CONFIG_X86)
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static void set_msi_source_id(struct pci_dev *pdev, struct iremap_entry *ire)
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{
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int type;
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@@ -678,7 +668,6 @@ void msi_msg_write_remap_rte(
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msi_msg_to_remap_entry(iommu, pdev, msi_desc, msg);
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}
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#endif
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int enable_intremap(struct iommu *iommu, int eim)
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{
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@@ -725,10 +714,9 @@ int enable_intremap(struct iommu *iommu, int eim)
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ir_ctrl->iremap_num = 0;
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}
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#ifdef CONFIG_X86
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/* set extended interrupt mode bit */
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ir_ctrl->iremap_maddr |= eim ? IRTA_EIME : 0;
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#endif
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spin_lock_irqsave(&iommu->register_lock, flags);
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/* set size of the interrupt remapping table */
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@@ -34,11 +34,9 @@
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#include <xen/softirq.h>
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#include <asm/msi.h>
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#include <asm/irq.h>
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#if defined(CONFIG_X86)
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#include <asm/hvm/vmx/vmx.h>
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#include <asm/p2m.h>
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#include <mach_apic.h>
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#endif
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#include "iommu.h"
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#include "dmar.h"
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#include "extern.h"
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@@ -1070,7 +1068,6 @@ static void dma_msi_set_affinity(struct irq_desc *desc, const cpumask_t *mask)
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unsigned long flags;
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struct iommu *iommu = desc->action->dev_id;
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#ifdef CONFIG_X86
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dest = set_desc_affinity(desc, mask);
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if (dest == BAD_APICID){
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dprintk(XENLOG_ERR VTDPREFIX, "Set iommu interrupt affinity error!\n");
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@@ -1094,16 +1091,6 @@ static void dma_msi_set_affinity(struct irq_desc *desc, const cpumask_t *mask)
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MSI_ADDR_REDIRECTION_CPU:
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MSI_ADDR_REDIRECTION_LOWPRI;
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msg.address_lo |= MSI_ADDR_DEST_ID(dest & 0xff);
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#else
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memset(&msg, 0, sizeof(msg));
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msg.data = desc->arch.vector & 0xff;
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msg.data |= 1 << 14;
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msg.address_lo = (MSI_ADDRESS_HEADER << (MSI_ADDRESS_HEADER_SHIFT + 8));
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msg.address_lo |= MSI_PHYSICAL_MODE << 2;
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msg.address_lo |= MSI_REDIRECTION_HINT_MODE << 3;
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dest = cpu_physical_id(cpumask_first(mask));
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msg.address_lo |= dest << MSI_TARGET_CPU_SHIFT;
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#endif
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spin_lock_irqsave(&iommu->register_lock, flags);
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dmar_writel(iommu->reg, DMAR_FEDATA_REG, msg.data);
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@@ -1137,11 +1124,7 @@ static int __init iommu_set_interrupt(struct acpi_drhd_unit *drhd)
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}
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irq_desc[irq].handler = &dma_msi_type;
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#ifdef CONFIG_X86
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ret = request_irq(irq, iommu_page_fault, 0, "dmar", drhd->iommu);
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#else
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ret = request_irq_vector(irq, iommu_page_fault, 0, "dmar", drhd->iommu);
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#endif
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if ( ret )
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{
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irq_desc[irq].handler = &no_irq_type;
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@@ -132,12 +132,8 @@ static void __init map_igd_reg(void)
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igd_reg = (igd_mmio & IGD_BAR_MASK) + 0x2000;
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/* ioremap this physical page */
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#if defined(CONFIG_X86)
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set_fixmap_nocache(FIX_IGD_MMIO, igd_reg);
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igd_reg_va = (u8 *)fix_to_virt(FIX_IGD_MMIO);
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#else
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igd_reg_va = ioremap_nocache(igd_reg, 0x1000);
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#endif
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}
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/*
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@@ -363,7 +359,6 @@ void me_wifi_quirk(struct domain *domain, u8 bus, u8 devfn, int map)
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*/
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void __init pci_vtd_quirk(struct pci_dev *pdev)
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{
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#ifdef CONFIG_X86
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int seg = pdev->seg;
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int bus = pdev->bus;
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int dev = PCI_SLOT(pdev->devfn);
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@@ -376,5 +371,4 @@ void __init pci_vtd_quirk(struct pci_dev *pdev)
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val = pci_conf_read32(seg, bus, dev, func, 0x1AC);
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pci_conf_write32(seg, bus, dev, func, 0x1AC, val | (1 << 31));
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}
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#endif
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}
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@@ -27,10 +27,7 @@
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#include "dmar.h"
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#include "vtd.h"
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#include "extern.h"
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#if defined(CONFIG_X86)
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#include <asm/io_apic.h>
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#endif
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int is_usb_device(u16 seg, u8 bus, u8 devfn)
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{
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@@ -188,7 +185,6 @@ void print_vtd_entries(struct iommu *iommu, int bus, int devfn, u64 gmfn)
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static void dump_iommu_info(unsigned char key)
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{
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#if defined(CONFIG_X86)
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struct acpi_drhd_unit *drhd;
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struct iommu *iommu;
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int i;
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@@ -300,9 +296,6 @@ static void dump_iommu_info(unsigned char key)
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}
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}
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}
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#else
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printk("%s: not implemented for now\n", __func__);
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#endif
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}
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struct keyhandler dump_iommu_info_keyhandler = {
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@@ -151,8 +151,6 @@ void __init vesa_init(void)
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xfree(line_len);
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}
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#if defined(CONFIG_X86)
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#include <asm/mtrr.h>
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static unsigned int vesa_mtrr;
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@@ -191,12 +189,6 @@ static void lfb_flush(void)
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__asm__ __volatile__ ("sfence" : : : "memory");
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}
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#else /* !defined(CONFIG_X86) */
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#define lfb_flush() ((void)0)
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#endif
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void __init vesa_endboot(bool_t keep)
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{
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if ( keep )
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