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bitkeeper revision 1.1159.179.2 (419cbedfAFJPmYd4XKno5lrw9LXJ0A)

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Auto-generate assembly struct offsets. Clean up Xen-death on
unhandleable traps/faults/NMIs/etc.
This commit is contained in:
kaf24@scramble.cl.cam.ac.uk committed 2004-11-18 15:25:19 +00:00
1 parent 4235e53fb7
commit 50bcd2e22a
11 files changed
+244 -192
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.rootkeys
+1
View File
@@ -606,6 +606,7 @@
3ddb79bc-Udq7ol-NX4q9XsYnN7A2Q xen/arch/x86/time.c
3ddb79bccYVzXZJyVaxuv5T42Z1Fsw xen/arch/x86/trampoline.S
3ddb79bcOftONV9h4QCxXOfiT0h91w xen/arch/x86/traps.c
419cbedeQDg8IrO3izo3o5rQNlo0kQ xen/arch/x86/x86_32/asm-offsets.c
3e32af9aRnYGl4GMOaDKp7JdfhOGhg xen/arch/x86/x86_32/domain_page.c
3ddb79bcecupHj56ZbTa3B0FxDowMg xen/arch/x86/x86_32/entry.S
3ddb79bcHwuCQDjBICDTSis52hWguw xen/arch/x86/x86_32/mm.c
BitKeeper/etc/ignore
+2
View File
@@ -62,12 +62,14 @@ tools/misc/xen_cpuperf
tools/web-shutdown.tap
tools/xentrace/xentrace
tools/xfrd/xfrd
xen/arch/x86/asm-offsets.s
xen/arch/x86/boot/mkelf32
xen/drivers/pci/classlist.h
xen/drivers/pci/devlist.h
xen/drivers/pci/gen-devlist
xen/figlet/figlet
xen/include/asm
xen/include/asm-*/asm-offsets.h
xen/include/hypervisor-ifs/arch
xen/include/xen/compile.h
xen/tools/elf-reloc
xen/Makefile
+19 -1
View File
@@ -34,10 +34,13 @@ clean:
$(MAKE) -C drivers clean
$(MAKE) -C arch/$(TARGET_ARCH) clean
rm -f include/asm *.o $(TARGET)* *~ core include/xen/compile.h
rm -f include/asm-*/asm-offsets.h
$(TARGET): delete-unfresh-files
[ -e include/asm ] || ln -sf asm-$(TARGET_ARCH) include/asm
$(MAKE) include/xen/compile.h
$(MAKE) -C arch/$(TARGET_ARCH) asm-offsets.s
$(MAKE) include/asm-$(TARGET_ARCH)/asm-offsets.h
$(MAKE) -C common
$(MAKE) -C drivers
$(MAKE) -C arch/$(TARGET_ARCH)
@@ -67,6 +70,22 @@ include/xen/compile.h:
cd ./figlet && make && ./figlet Xen $(XEN_VERSION).$(XEN_SUBVERSION)$(XEN_EXTRAVERSION) 1>>../$@ && cd ..
@LANG=C echo >> $@
include/asm-$(TARGET_ARCH)/asm-offsets.h: arch/$(TARGET_ARCH)/asm-offsets.s
@(set -e; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was auto-generated from $<"; \
echo " *"; \
echo " */"; \
echo ""; \
echo "#ifndef __ASM_OFFSETS_H__"; \
echo "#define __ASM_OFFSETS_H__"; \
echo ""; \
sed -ne "/^->/{s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; s:->::; p;}"; \
echo ""; \
echo "#endif") <$< >$@
.PHONY: default debug install dist clean delete-unfresh-files TAGS
SUBDIRS = arch common drivers
@@ -77,4 +96,3 @@ TAGS:
find $(SUBDIRS) -name '*.[ch]' ) | grep -v /SCCS/ | etags -
MAP:
nm $(TARGET) | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | sort > System.map
xen/arch/x86/Makefile
+8 -1
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@@ -9,16 +9,23 @@ endif
OBJS += $(patsubst %.S,%.o,$(wildcard $(TARGET_SUBARCH)/*.S))
OBJS += $(patsubst %.c,%.o,$(wildcard $(TARGET_SUBARCH)/*.c))
OBJS := $(subst $(TARGET_SUBARCH)/asm-offsets.o,,$(OBJS))
default: boot/$(TARGET_SUBARCH).o $(OBJS) boot/mkelf32
$(LD) $(LDFLAGS) -r -o arch.o $(OBJS)
$(LD) $(LDFLAGS) -T $(TARGET_SUBARCH)/xen.lds -N \
boot/$(TARGET_SUBARCH).o $(ALL_OBJS) -o $(TARGET)-syms
./boot/mkelf32 $(TARGET)-syms $(TARGET) 0x100000
asm-offsets.s: $(TARGET_SUBARCH)/asm-offsets.c
$(CC) $(CFLAGS) -S -o $@ $<
boot/mkelf32: boot/mkelf32.c
$(HOSTCC) $(HOSTCFLAGS) -o $@ $<
clean:
rm -f *.o *~ core boot/*.o boot/*~ boot/core boot/mkelf32
rm -f *.o *.s *~ core boot/*.o boot/*~ boot/core boot/mkelf32
rm -f x86_32/*.o x86_32/*~ x86_32/core
rm -f x86_64/*.o x86_64/*~ x86_64/core
.PHONY: default clean
xen/arch/x86/nmi.c
+2 -4
View File
@@ -25,12 +25,12 @@
#include <asm/smp.h>
#include <asm/msr.h>
#include <asm/mpspec.h>
#include <asm/debugger.h>
unsigned int nmi_watchdog = NMI_NONE;
unsigned int watchdog_on = 0;
static unsigned int nmi_hz = HZ;
unsigned int nmi_perfctr_msr; /* the MSR to reset in NMI handler */
extern void show_registers(struct xen_regs *regs);
extern int logical_proc_id[];
@@ -272,8 +272,6 @@ void touch_nmi_watchdog (void)
void nmi_watchdog_tick (struct xen_regs * regs)
{
extern void die(const char * str, struct xen_regs * regs, long err);
int sum, cpu = smp_processor_id();
sum = apic_timer_irqs[cpu];
@@ -288,7 +286,7 @@ void nmi_watchdog_tick (struct xen_regs * regs)
if ( alert_counter[cpu] == 5*nmi_hz )
{
console_force_unlock();
die("NMI Watchdog detected LOCKUP on CPU", regs, cpu);
fatal_trap(TRAP_nmi, regs, 0);
}
}
else
xen/arch/x86/traps.c
+64 -67
View File
@@ -52,8 +52,6 @@
#include <asm/i387.h>
#include <asm/debugger.h>
extern char opt_nmi[];
struct guest_trap_bounce guest_trap_bounce[NR_CPUS] = { { 0 } };
#if defined(__i386__)
@@ -199,19 +197,38 @@ void show_registers(struct xen_regs *regs)
show_stack(&regs->esp);
}
spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
void die(const char *str, struct xen_regs * regs, long err)
/*
* This is called for faults at very unexpected times (e.g., when interrupts
* are disabled). In such situations we can't do much that is safe. We try to
* print out some tracing and then we just spin.
*/
asmlinkage void fatal_trap(int trapnr, struct xen_regs *regs, long error_code)
{
unsigned long flags;
spin_lock_irqsave(&die_lock, flags);
printk("%s: %04lx,%04lx\n", str, err >> 16, err & 0xffff);
show_registers(regs);
spin_unlock_irqrestore(&die_lock, flags);
panic("Fatal crash within Xen.\n");
}
int cpu = smp_processor_id();
static char *trapstr[] = {
"divide error", "debug", "nmi", "bkpt", "overflow", "bounds",
"invalid operation", "device not available", "double fault",
"coprocessor segment", "invalid tss", "segment not found",
"stack error", "general protection fault", "page fault",
"spurious interrupt", "coprocessor error", "alignment check",
"machine check", "simd error"
};
show_registers(regs);
printk("************************************\n");
printk("CPU%d FATAL TRAP %d (%s), ERROR_CODE %lx%s.\n",
cpu, trapnr, trapstr[trapnr], error_code,
(regs->eflags & X86_EFLAGS_IF) ? "" : ", IN INTERRUPT CONTEXT");
printk("System shutting down -- need manual reset.\n");
printk("************************************\n");
/* Lock up the console to prevent spurious output from other CPUs. */
console_force_lock();
/* Wait for manual reset. */
for ( ; ; )
__asm__ __volatile__ ( "hlt" );
}
static inline void do_trap(int trapnr, char *str,
struct xen_regs *regs,
@@ -275,7 +292,6 @@ DO_ERROR(11, "segment not present", segment_not_present)
DO_ERROR(12, "stack segment", stack_segment)
DO_ERROR_NOCODE(16, "fpu error", coprocessor_error)
DO_ERROR(17, "alignment check", alignment_check)
DO_ERROR_NOCODE(18, "machine check", machine_check)
DO_ERROR_NOCODE(19, "simd error", simd_coprocessor_error)
asmlinkage void do_int3(struct xen_regs *regs, long error_code)
@@ -328,13 +344,17 @@ asmlinkage void do_double_fault(void)
printk("System needs manual reset.\n");
printk("************************************\n");
DEBUGGER_trap_fatal(TRAP_double_fault, NULL, 0);
/* Lock up the console to prevent spurious output from other CPUs. */
console_force_lock();
/* Wait for manual reset. */
for ( ; ; ) ;
for ( ; ; )
__asm__ __volatile__ ( "hlt" );
}
asmlinkage void do_machine_check(struct xen_regs *regs, long error_code)
{
fatal_trap(TRAP_machine_check, regs, error_code);
}
asmlinkage void do_page_fault(struct xen_regs *regs, long error_code)
@@ -509,47 +529,24 @@ asmlinkage void do_general_protection(struct xen_regs *regs, long error_code)
DEBUGGER_trap_fatal(TRAP_gp_fault, regs, error_code);
die("general protection fault", regs, error_code);
show_registers(regs);
panic("CPU%d GENERAL PROTECTION FAULT\n"
"[error_code=%08x]\n", smp_processor_id(), error_code);
}
asmlinkage void mem_parity_error(struct xen_regs *regs)
{
console_force_unlock();
printk("\n\n");
show_registers(regs);
printk("************************************\n");
printk("CPU%d MEMORY ERROR -- system shutdown\n", smp_processor_id());
printk("System needs manual reset.\n");
printk("************************************\n");
/* Lock up the console to prevent spurious output from other CPUs. */
console_force_lock();
/* Wait for manual reset. */
for ( ; ; ) ;
printk("\n\nNMI - MEMORY ERROR\n");
fatal_trap(TRAP_nmi, regs, 0);
}
asmlinkage void io_check_error(struct xen_regs *regs)
{
console_force_unlock();
printk("\n\n");
show_registers(regs);
printk("************************************\n");
printk("CPU%d I/O ERROR -- system shutdown\n", smp_processor_id());
printk("System needs manual reset.\n");
printk("************************************\n");
/* Lock up the console to prevent spurious output from other CPUs. */
console_force_lock();
/* Wait for manual reset. */
for ( ; ; ) ;
printk("\n\nNMI - I/O ERROR\n");
fatal_trap(TRAP_nmi, regs, 0);
}
static void unknown_nmi_error(unsigned char reason, struct xen_regs * regs)
@@ -738,26 +735,26 @@ void __init trap_init(void)
* saved. The page-fault handler also needs interrupts disabled until %cr2
* has been read and saved on the stack.
*/
set_intr_gate(0,&divide_error);
set_intr_gate(1,&debug);
set_intr_gate(2,&nmi);
set_system_gate(3,&int3); /* usable from all privilege levels */
set_system_gate(4,&overflow); /* usable from all privilege levels */
set_intr_gate(5,&bounds);
set_intr_gate(6,&invalid_op);
set_intr_gate(7,&device_not_available);
set_task_gate(8,__DOUBLEFAULT_TSS_ENTRY<<3);
set_intr_gate(9,&coprocessor_segment_overrun);
set_intr_gate(10,&invalid_TSS);
set_intr_gate(11,&segment_not_present);
set_intr_gate(12,&stack_segment);
set_intr_gate(13,&general_protection);
set_intr_gate(14,&page_fault);
set_intr_gate(15,&spurious_interrupt_bug);
set_intr_gate(16,&coprocessor_error);
set_intr_gate(17,&alignment_check);
set_intr_gate(18,&machine_check);
set_intr_gate(19,&simd_coprocessor_error);
set_intr_gate(TRAP_divide_error,&divide_error);
set_intr_gate(TRAP_debug,&debug);
set_intr_gate(TRAP_nmi,&nmi);
set_system_gate(TRAP_int3,&int3); /* usable from all privileges */
set_system_gate(TRAP_overflow,&overflow); /* usable from all privileges */
set_intr_gate(TRAP_bounds,&bounds);
set_intr_gate(TRAP_invalid_op,&invalid_op);
set_intr_gate(TRAP_no_device,&device_not_available);
set_task_gate(TRAP_double_fault,__DOUBLEFAULT_TSS_ENTRY<<3);
set_intr_gate(TRAP_copro_seg,&coprocessor_segment_overrun);
set_intr_gate(TRAP_invalid_tss,&invalid_TSS);
set_intr_gate(TRAP_no_segment,&segment_not_present);
set_intr_gate(TRAP_stack_error,&stack_segment);
set_intr_gate(TRAP_gp_fault,&general_protection);
set_intr_gate(TRAP_page_fault,&page_fault);
set_intr_gate(TRAP_spurious_int,&spurious_interrupt_bug);
set_intr_gate(TRAP_copro_error,&coprocessor_error);
set_intr_gate(TRAP_alignment_check,&alignment_check);
set_intr_gate(TRAP_machine_check,&machine_check);
set_intr_gate(TRAP_simd_error,&simd_coprocessor_error);
/* Only ring 1 can access Xen services. */
_set_gate(idt_table+HYPERCALL_VECTOR,14,1,&hypercall);
xen/arch/x86/x86_32/asm-offsets.c
+57
View File
@@ -0,0 +1,57 @@
/*
* Generate definitions needed by assembly language modules.
* This code generates raw asm output which is post-processed
* to extract and format the required data.
*/
#include <xen/sched.h>
#define DEFINE(_sym, _val) \
__asm__ __volatile__ ( "\n->" #_sym " %0 " #_val : : "i" _val )
#define BLANK() \
__asm__ __volatile__ ( "\n->" : : )
#define OFFSET(_sym, _str, _mem) \
DEFINE(_sym, offsetof(_str, _mem));
void __dummy__(void)
{
OFFSET(XREGS_eax, struct xen_regs, eax);
OFFSET(XREGS_ebx, struct xen_regs, ebx);
OFFSET(XREGS_ecx, struct xen_regs, ecx);
OFFSET(XREGS_edx, struct xen_regs, edx);
OFFSET(XREGS_esi, struct xen_regs, esi);
OFFSET(XREGS_edi, struct xen_regs, edi);
OFFSET(XREGS_esp, struct xen_regs, esp);
OFFSET(XREGS_ebp, struct xen_regs, ebp);
OFFSET(XREGS_eip, struct xen_regs, eip);
OFFSET(XREGS_cs, struct xen_regs, cs);
OFFSET(XREGS_ds, struct xen_regs, ds);
OFFSET(XREGS_es, struct xen_regs, es);
OFFSET(XREGS_fs, struct xen_regs, fs);
OFFSET(XREGS_gs, struct xen_regs, gs);
OFFSET(XREGS_ss, struct xen_regs, ss);
OFFSET(XREGS_eflags, struct xen_regs, eflags);
OFFSET(XREGS_orig_eax, struct xen_regs, orig_eax);
BLANK();
OFFSET(DOMAIN_processor, struct domain, processor);
OFFSET(DOMAIN_shared_info, struct domain, shared_info);
OFFSET(DOMAIN_event_sel, struct domain, event_selector);
OFFSET(DOMAIN_event_addr, struct domain, event_address);
OFFSET(DOMAIN_failsafe_sel, struct domain, failsafe_selector);
OFFSET(DOMAIN_failsafe_addr, struct domain, failsafe_address);
BLANK();
OFFSET(SHINFO_upcall_pending, shared_info_t,
vcpu_data[0].evtchn_upcall_pending);
OFFSET(SHINFO_upcall_mask, shared_info_t,
vcpu_data[0].evtchn_upcall_mask);
BLANK();
OFFSET(GTB_error_code, struct guest_trap_bounce, error_code);
OFFSET(GTB_cr2, struct guest_trap_bounce, cr2);
OFFSET(GTB_flags, struct guest_trap_bounce, flags);
OFFSET(GTB_cs, struct guest_trap_bounce, cs);
OFFSET(GTB_eip, struct guest_trap_bounce, eip);
BLANK();
}
xen/common/keyhandler.c
-2
View File
@@ -81,10 +81,8 @@ static void show_handlers(unsigned char key)
key_table[i].desc);
}
static void dump_registers(unsigned char key, struct xen_regs *regs)
{
extern void show_registers(struct xen_regs *regs);
printk("'%c' pressed -> dumping registers\n", key);
show_registers(regs);
}
xen/include/asm-x86/processor.h
+84 -65
View File
@@ -7,6 +7,7 @@
#ifndef __ASM_X86_PROCESSOR_H
#define __ASM_X86_PROCESSOR_H
#ifndef __ASSEMBLY__
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cpufeature.h>
@@ -16,6 +17,81 @@
#include <xen/config.h>
#include <xen/spinlock.h>
#include <public/xen.h>
#endif
/*
* CPU vendor IDs
*/
#define X86_VENDOR_INTEL 0
#define X86_VENDOR_CYRIX 1
#define X86_VENDOR_AMD 2
#define X86_VENDOR_UMC 3
#define X86_VENDOR_NEXGEN 4
#define X86_VENDOR_CENTAUR 5
#define X86_VENDOR_RISE 6
#define X86_VENDOR_TRANSMETA 7
#define X86_VENDOR_NSC 8
#define X86_VENDOR_SIS 9
#define X86_VENDOR_UNKNOWN 0xff
/*
* EFLAGS bits
*/
#define X86_EFLAGS_CF 0x00000001 /* Carry Flag */
#define X86_EFLAGS_PF 0x00000004 /* Parity Flag */
#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
#define X86_EFLAGS_AC 0x00040000 /* Alignment Check */
#define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */
#define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
/*
* Intel CPU flags in CR0
*/
#define X86_CR0_PE 0x00000001 /* Enable Protected Mode (RW) */
#define X86_CR0_MP 0x00000002 /* Monitor Coprocessor (RW) */
#define X86_CR0_EM 0x00000004 /* Require FPU Emulation (RO) */
#define X86_CR0_TS 0x00000008 /* Task Switched (RW) */
#define X86_CR0_NE 0x00000020 /* Numeric Error Reporting (RW) */
#define X86_CR0_WP 0x00010000 /* Supervisor Write Protect (RW) */
#define X86_CR0_AM 0x00040000 /* Alignment Checking (RW) */
#define X86_CR0_NW 0x20000000 /* Not Write-Through (RW) */
#define X86_CR0_CD 0x40000000 /* Cache Disable (RW) */
#define X86_CR0_PG 0x80000000 /* Paging (RW) */
/*
* Intel CPU features in CR4
*/
#define X86_CR4_VME 0x0001 /* enable vm86 extensions */
#define X86_CR4_PVI 0x0002 /* virtual interrupts flag enable */
#define X86_CR4_TSD 0x0004 /* disable time stamp at ipl 3 */
#define X86_CR4_DE 0x0008 /* enable debugging extensions */
#define X86_CR4_PSE 0x0010 /* enable page size extensions */
#define X86_CR4_PAE 0x0020 /* enable physical address extensions */
#define X86_CR4_MCE 0x0040 /* Machine check enable */
#define X86_CR4_PGE 0x0080 /* enable global pages */
#define X86_CR4_PCE 0x0100 /* enable performance counters at ipl 3 */
#define X86_CR4_OSFXSR 0x0200 /* enable fast FPU save and restore */
#define X86_CR4_OSXMMEXCPT 0x0400 /* enable unmasked SSE exceptions */
/*
* 'guest_trap_bounce' flags values.
*/
#define GTBF_TRAP 1
#define GTBF_TRAP_NOCODE 2
#define GTBF_TRAP_CR2 4
#ifndef __ASSEMBLY__
struct domain;
@@ -49,18 +125,6 @@ struct cpuinfo_x86 {
int x86_tlbsize; /* number of 4K pages in DTLB/ITLB combined */
} __attribute__((__aligned__(SMP_CACHE_BYTES)));
#define X86_VENDOR_INTEL 0
#define X86_VENDOR_CYRIX 1
#define X86_VENDOR_AMD 2
#define X86_VENDOR_UMC 3
#define X86_VENDOR_NEXGEN 4
#define X86_VENDOR_CENTAUR 5
#define X86_VENDOR_RISE 6
#define X86_VENDOR_TRANSMETA 7
#define X86_VENDOR_NSC 8
#define X86_VENDOR_SIS 9
#define X86_VENDOR_UNKNOWN 0xff
/*
* capabilities of CPUs
*/
@@ -82,27 +146,6 @@ extern void identify_cpu(struct cpuinfo_x86 *);
extern void print_cpu_info(struct cpuinfo_x86 *);
extern void dodgy_tsc(void);
/*
* EFLAGS bits
*/
#define X86_EFLAGS_CF 0x00000001 /* Carry Flag */
#define X86_EFLAGS_PF 0x00000004 /* Parity Flag */
#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
#define X86_EFLAGS_NT 0x00004000 /* Nested Task */
#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
#define X86_EFLAGS_AC 0x00040000 /* Alignment Check */
#define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */
#define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
/*
* Generic CPUID function
*/
@@ -161,20 +204,6 @@ static inline unsigned int cpuid_edx(unsigned int op)
}
/*
* Intel CPU flags in CR0
*/
#define X86_CR0_PE 0x00000001 /* Enable Protected Mode (RW) */
#define X86_CR0_MP 0x00000002 /* Monitor Coprocessor (RW) */
#define X86_CR0_EM 0x00000004 /* Require FPU Emulation (RO) */
#define X86_CR0_TS 0x00000008 /* Task Switched (RW) */
#define X86_CR0_NE 0x00000020 /* Numeric Error Reporting (RW) */
#define X86_CR0_WP 0x00010000 /* Supervisor Write Protect (RW) */
#define X86_CR0_AM 0x00040000 /* Alignment Checking (RW) */
#define X86_CR0_NW 0x20000000 /* Not Write-Through (RW) */
#define X86_CR0_CD 0x40000000 /* Cache Disable (RW) */
#define X86_CR0_PG 0x80000000 /* Paging (RW) */
#define read_cr0() ({ \
unsigned long __dummy; \
__asm__( \
@@ -187,21 +216,6 @@ static inline unsigned int cpuid_edx(unsigned int op)
__asm__("mov"__OS" %0,%%cr0": :"r" (x));
/*
* Intel CPU features in CR4
*/
#define X86_CR4_VME 0x0001 /* enable vm86 extensions */
#define X86_CR4_PVI 0x0002 /* virtual interrupts flag enable */
#define X86_CR4_TSD 0x0004 /* disable time stamp at ipl 3 */
#define X86_CR4_DE 0x0008 /* enable debugging extensions */
#define X86_CR4_PSE 0x0010 /* enable page size extensions */
#define X86_CR4_PAE 0x0020 /* enable physical address extensions */
#define X86_CR4_MCE 0x0040 /* Machine check enable */
#define X86_CR4_PGE 0x0080 /* enable global pages */
#define X86_CR4_PCE 0x0100 /* enable performance counters at ipl 3 */
#define X86_CR4_OSFXSR 0x0200 /* enable fast FPU save and restore */
#define X86_CR4_OSXMMEXCPT 0x0400 /* enable unmasked SSE exceptions */
/*
* Save the cr4 feature set we're using (ie
* Pentium 4MB enable and PPro Global page
@@ -344,9 +358,6 @@ long set_fast_trap(struct domain *p, int idx);
#endif /* __x86_64__ */
#define GTBF_TRAP 1
#define GTBF_TRAP_NOCODE 2
#define GTBF_TRAP_CR2 4
struct guest_trap_bounce {
unsigned long error_code; /* 0 */
unsigned long cr2; /* 4 */
@@ -477,4 +488,12 @@ extern inline void prefetchw(const void *x)
#endif
void show_guest_stack();
void show_trace(unsigned long *esp);
void show_stack(unsigned long *esp);
void show_registers(struct xen_regs *regs);
asmlinkage void fatal_trap(int trapnr, struct xen_regs *regs, long error_code);
#endif /* !__ASSEMBLY__ */
#endif /* __ASM_X86_PROCESSOR_H */
xen/include/asm-x86/shadow.h
+3 -6
View File
@@ -116,18 +116,15 @@ static inline int __mark_dirty( struct mm_struct *m, unsigned int mfn)
#ifndef NDEBUG
else if ( mfn < max_page )
{
unsigned long *esp;
SH_LOG("mark_dirty OOR! mfn=%x pfn=%lx max=%x (mm %p)",
mfn, pfn, m->shadow_dirty_bitmap_size, m );
SH_LOG("dom=%p caf=%08x taf=%08x\n",
frame_table[mfn].u.inuse.domain,
frame_table[mfn].count_info,
frame_table[mfn].u.inuse.type_info );
{
extern void show_trace(unsigned long *esp);
unsigned long *esp;
__asm__ __volatile__ ("movl %%esp,%0" : "=r" (esp) : );
show_trace(esp);
}
__asm__ __volatile__ ("movl %%esp,%0" : "=r" (esp) : );
show_trace(esp);
}
#endif
xen/include/asm-x86/x86_32/asm_defns.h
+4 -46
View File
@@ -1,56 +1,14 @@
#ifndef __ASM_DEFNS_H__
#define __ASM_DEFNS_H__
/* Offsets in 'struct xen_regs' --- AUTO-GENERATE ME! */
#define XREGS_ebx 0x00
#define XREGS_ecx 0x04
#define XREGS_edx 0x08
#define XREGS_esi 0x0C
#define XREGS_edi 0x10
#define XREGS_ebp 0x14
#define XREGS_eax 0x18
#define XREGS_orig_eax 0x1C
#define XREGS_eip 0x20
#define XREGS_cs 0x24
#define XREGS_eflags 0x28
#define XREGS_esp 0x2C
#define XREGS_ss 0x30
#define XREGS_es 0x34
#define XREGS_ds 0x38
#define XREGS_fs 0x3C
#define XREGS_gs 0x40
/* Offsets in 'struct domain' --- AUTO-GENERATE ME! */
#define DOMAIN_processor 0
#define DOMAIN_shared_info 4
#define DOMAIN_event_sel 8
#define DOMAIN_event_addr 12
#define DOMAIN_failsafe_sel 16
#define DOMAIN_failsafe_addr 20
/* Offsets in shared_info_t --- AUTO-GENERATE ME! */
#define SHINFO_upcall_pending /* 0 */
#define SHINFO_upcall_mask 1
/* Offsets in 'struct guest_trap_bounce' --- AUTO-GENERATE ME! */
#define GTB_error_code 0
#define GTB_cr2 4
#define GTB_flags 8
#define GTB_cs 10
#define GTB_eip 12
#define GTBF_TRAP 1
#define GTBF_TRAP_NOCODE 2
#define GTBF_TRAP_CR2 4
/* EFLAGS masks. */
#define CF_MASK 0x00000001
#define IF_MASK 0x00000200
#define NT_MASK 0x00004000
/* NB. Auto-generated from arch/.../asm-offsets.c */
#include <asm/asm-offsets.h>
#include <asm/processor.h>
#define __STR(x) #x
#define STR(x) __STR(x)
/* AUTO-GENERATE the following two cases (quoted vs. unquoted). */
/* Maybe auto-generate the following two cases (quoted vs. unquoted). */
#ifndef __ASSEMBLY__
#define __SAVE_ALL_PRE(_reg) \
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