x86/pvh: set only minimal cr0 and cr4 flags in order to use paging

Right now Xen sets the WP and NE flags on cr0 for PVH, which are not
needed in order to boot with paging enabled. The same happens with
cr4, at least on my system OSFXSR, OSXMMEXCPT and MCE are enabled by
default when there's no need.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: George Dunlap <george.dunlap@eu.citrix.com>
Acked-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

xen/arch/x86/hvm/vmx/vmcs.c

@@ -28,7 +28,6 @@
 #include <asm/msr.h>
 #include <asm/xstate.h>
 #include <asm/hvm/hvm.h>
-#include <asm/hvm/nestedhvm.h>
 #include <asm/hvm/io.h>
 #include <asm/hvm/support.h>
 #include <asm/hvm/vmx/vmx.h>
@@ -1090,13 +1089,11 @@ static int construct_vmcs(struct vcpu *v)
 
     /* PVH domains always start in paging mode */
     if ( is_pvh_domain(d) )
-        v->arch.hvm_vcpu.guest_cr[0] |= X86_CR0_PG | X86_CR0_NE | X86_CR0_WP;
+        v->arch.hvm_vcpu.guest_cr[0] |= X86_CR0_PG;
 
     hvm_update_guest_cr(v, 0);
 
-    v->arch.hvm_vcpu.guest_cr[4] = is_pvh_domain(d) ?
-        (real_cr4_to_pv_guest_cr4(mmu_cr4_features)
-         & ~HVM_CR4_GUEST_RESERVED_BITS(v)) : 0;
+    v->arch.hvm_vcpu.guest_cr[4] = is_pvh_domain(d) ? X86_CR4_PAE : 0;
     hvm_update_guest_cr(v, 4);
 
     if ( cpu_has_vmx_tpr_shadow )