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xen/arm: gic-v3: Clean-up the GIC*_PIDR2_* definitions
GICR_PIDR2 and GICD_PIDR2 use the same register layout. Rather than
define twice, one of which is an alias to the other, introduce GIC_PIDR2_*
defines.
Also:
* Use the same prefix for the mask and the value
* Integrate the shift in the value to avoid shifting in the code
* Use GICv* to match the value name in the spec
* Move them in a proper place
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
This commit is contained in:
Julien Grall authored and 
Ian Campbell committed
1 parent
c57e6ebd8c
commit
55e8b12a5c
2 files changed
+8
-12
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@@ -639,8 +639,8 @@ static int __init gicv3_populate_rdist(void)
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{
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void __iomem *ptr = gicv3.rdist_regions[i].map_base;
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reg = readl_relaxed(ptr + GICR_PIDR2) & GICR_PIDR2_ARCH_REV_MASK;
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if ( (reg >> GICR_PIDR2_ARCH_REV_SHIFT) != GICR_PIDR2_ARCH_GICV3 )
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reg = readl_relaxed(ptr + GICR_PIDR2) & GIC_PIDR2_ARCH_MASK;
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if ( reg != GIC_PIDR2_ARCH_GICv3 )
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{
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dprintk(XENLOG_ERR,
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"GICv3: No redistributor present @%"PRIpaddr"\n",
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@@ -1193,8 +1193,8 @@ static int __init gicv3_init(void)
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if ( !gicv3.map_dbase )
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panic("GICv3: Failed to ioremap for GIC distributor\n");
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reg = readl_relaxed(GICD + GICD_PIDR2) & GICD_PIDR2_ARCH_REV_MASK;
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if ( ((reg >> GICD_PIDR2_ARCH_REV_SHIFT) != GICD_PIDR2_ARCH_GICV3) )
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reg = readl_relaxed(GICD + GICD_PIDR2) & GIC_PIDR2_ARCH_MASK;
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if ( reg != GIC_PIDR2_ARCH_GICv3 )
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panic("GICv3: no distributor detected\n");
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if ( !dt_property_read_u32(node, "#redistributor-regions",
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@@ -40,6 +40,10 @@
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#define GICD_PIDR5 (0xFFD4)
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#define GICD_PIDR7 (0xFFDC)
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/* Common between GICD_PIDR2 and GICR_PIDR2 */
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#define GIC_PIDR2_ARCH_MASK (0xf0)
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#define GIC_PIDR2_ARCH_GICv3 (0x30)
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#define GICC_SRE_EL2_SRE (1UL << 0)
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#define GICC_SRE_EL2_DFB (1UL << 1)
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#define GICC_SRE_EL2_DIB (1UL << 2)
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@@ -59,14 +63,6 @@
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#define GICR_WAKER_ProcessorSleep (1U << 1)
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#define GICR_WAKER_ChildrenAsleep (1U << 2)
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#define GICD_PIDR2_ARCH_REV_MASK (0xf0)
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#define GICD_PIDR2_ARCH_REV_SHIFT (0x4)
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#define GICD_PIDR2_ARCH_GICV3 (0x3)
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#define GICR_PIDR2_ARCH_REV_MASK GICD_PIDR2_ARCH_REV_MASK
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#define GICR_PIDR2_ARCH_REV_SHIFT GICD_PIDR2_ARCH_REV_SHIFT
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#define GICR_PIDR2_ARCH_GICV3 GICD_PIDR2_ARCH_GICV3
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#define GICR_SYNCR_NOT_BUSY 1
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/*
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* Implementation defined value JEP106?
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