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x86/cpu-policy: Rearrange guest_common_default_feature_adjustments()
This is prep work, split out to simply the diff on the following change.
* Split the INTEL check out of the IvyBridge RDRAND check, as the former will
be reused.
No functional change.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit 064f572f96)
This commit is contained in:
1 parent
06a2b62145
commit
5619a526ea
1 file changed
+18
-15
+18
-15
@@ -429,21 +429,24 @@ static void __init guest_common_max_feature_adjustments(uint32_t *fs)
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static void __init guest_common_default_feature_adjustments(uint32_t *fs)
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{
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/*
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* IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS
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* (XSA-320 / CVE-2020-0543), and won't be receiving microcode to
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* compensate.
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*
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* Mitigate by hiding RDRAND from guests by default, unless explicitly
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* overridden on the Xen command line (cpuid=rdrand). Irrespective of the
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* default setting, guests can use RDRAND if explicitly enabled
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* (cpuid="host,rdrand=1") in the VM's config file, and VMs which were
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* previously using RDRAND can migrate in.
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*/
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if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
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boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x3a &&
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cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) )
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__clear_bit(X86_FEATURE_RDRAND, fs);
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if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
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{
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/*
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* IvyBridge client parts suffer from leakage of RDRAND data due to SRBDS
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* (XSA-320 / CVE-2020-0543), and won't be receiving microcode to
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* compensate.
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*
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* Mitigate by hiding RDRAND from guests by default, unless explicitly
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* overridden on the Xen command line (cpuid=rdrand). Irrespective of the
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* default setting, guests can use RDRAND if explicitly enabled
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* (cpuid="host,rdrand=1") in the VM's config file, and VMs which were
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* previously using RDRAND can migrate in.
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*/
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if ( boot_cpu_data.x86 == 6 &&
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boot_cpu_data.x86_model == 0x3a /* INTEL_FAM6_IVYBRIDGE */ &&
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cpu_has_rdrand && !is_forced_cpu_cap(X86_FEATURE_RDRAND) )
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__clear_bit(X86_FEATURE_RDRAND, fs);
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}
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/*
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* On certain hardware, speculative or errata workarounds can result in
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