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x86/boot: Move MSR policy initialisation logic into cpu-policy.c
Switch to the newer cpu_policy nomenclature.
No practical change.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit 4f20f596ce)
This commit is contained in:
Andrew Cooper committed
1 parent
31bdc9d1b9
commit
56b9ce39ce
5 files changed
+89
-86
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@@ -20,6 +20,90 @@ struct cpu_policy __read_mostly hvm_max_cpu_policy;
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struct cpu_policy __read_mostly hvm_def_cpu_policy;
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#endif
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static void __init calculate_raw_policy(void)
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{
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struct cpu_policy *p = &raw_cpu_policy;
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/* 0x000000ce MSR_INTEL_PLATFORM_INFO */
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/* Was already added by probe_cpuid_faulting() */
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if ( cpu_has_arch_caps )
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rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw);
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}
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static void __init calculate_host_policy(void)
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{
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struct cpu_policy *p = &host_cpu_policy;
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*p = raw_cpu_policy;
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/* 0x000000ce MSR_INTEL_PLATFORM_INFO */
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/* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
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p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
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/* Temporary, until we have known_features[] for feature bits in MSRs. */
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p->arch_caps.raw &=
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(ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA |
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ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO |
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ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
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ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO |
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ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO |
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ARCH_CAPS_PBRSB_NO);
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}
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static void __init calculate_pv_max_policy(void)
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{
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struct cpu_policy *p = &pv_max_cpu_policy;
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*p = host_cpu_policy;
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p->arch_caps.raw = 0; /* Not supported yet. */
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}
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static void __init calculate_pv_def_policy(void)
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{
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struct cpu_policy *p = &pv_def_cpu_policy;
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*p = pv_max_cpu_policy;
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}
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static void __init calculate_hvm_max_policy(void)
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{
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struct cpu_policy *p = &hvm_max_cpu_policy;
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*p = host_cpu_policy;
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/* It's always possible to emulate CPUID faulting for HVM guests */
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p->platform_info.cpuid_faulting = true;
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p->arch_caps.raw = 0; /* Not supported yet. */
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}
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static void __init calculate_hvm_def_policy(void)
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{
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struct cpu_policy *p = &hvm_def_cpu_policy;
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*p = hvm_max_cpu_policy;
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}
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void __init init_guest_cpu_policies(void)
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{
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calculate_raw_policy();
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calculate_host_policy();
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if ( IS_ENABLED(CONFIG_PV) )
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{
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calculate_pv_max_policy();
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calculate_pv_def_policy();
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}
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if ( hvm_enabled )
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{
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calculate_hvm_max_policy();
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calculate_hvm_def_policy();
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}
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}
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int init_domain_cpu_policy(struct domain *d)
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{
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struct cpu_policy *p = is_pv_domain(d)
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@@ -36,90 +36,6 @@
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DEFINE_PER_CPU(uint32_t, tsc_aux);
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static void __init calculate_raw_policy(void)
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{
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struct msr_policy *mp = &raw_cpu_policy;
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/* 0x000000ce MSR_INTEL_PLATFORM_INFO */
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/* Was already added by probe_cpuid_faulting() */
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if ( cpu_has_arch_caps )
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rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw);
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}
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static void __init calculate_host_policy(void)
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{
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struct msr_policy *mp = &host_cpu_policy;
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*mp = raw_cpu_policy;
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/* 0x000000ce MSR_INTEL_PLATFORM_INFO */
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/* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
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mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
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/* Temporary, until we have known_features[] for feature bits in MSRs. */
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mp->arch_caps.raw &=
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(ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA |
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ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO |
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ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
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ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO |
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ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO |
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ARCH_CAPS_PBRSB_NO);
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}
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static void __init calculate_pv_max_policy(void)
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{
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struct msr_policy *mp = &pv_max_cpu_policy;
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*mp = host_cpu_policy;
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mp->arch_caps.raw = 0; /* Not supported yet. */
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}
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static void __init calculate_pv_def_policy(void)
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{
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struct msr_policy *mp = &pv_def_cpu_policy;
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*mp = pv_max_cpu_policy;
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}
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static void __init calculate_hvm_max_policy(void)
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{
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struct msr_policy *mp = &hvm_max_cpu_policy;
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*mp = host_cpu_policy;
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/* It's always possible to emulate CPUID faulting for HVM guests */
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mp->platform_info.cpuid_faulting = true;
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mp->arch_caps.raw = 0; /* Not supported yet. */
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}
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static void __init calculate_hvm_def_policy(void)
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{
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struct msr_policy *mp = &hvm_def_cpu_policy;
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*mp = hvm_max_cpu_policy;
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}
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void __init init_guest_msr_policy(void)
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{
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calculate_raw_policy();
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calculate_host_policy();
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if ( IS_ENABLED(CONFIG_PV) )
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{
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calculate_pv_max_policy();
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calculate_pv_def_policy();
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}
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if ( hvm_enabled )
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{
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calculate_hvm_max_policy();
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calculate_hvm_def_policy();
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}
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}
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int init_vcpu_msr_policy(struct vcpu *v)
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{
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struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs);
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@@ -51,6 +51,7 @@
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#include <asm/nmi.h>
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#include <asm/alternative.h>
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#include <asm/mc146818rtc.h>
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#include <asm/cpu-policy.h>
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#include <asm/cpuid.h>
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#include <asm/spec_ctrl.h>
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#include <asm/guest.h>
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@@ -1991,7 +1992,7 @@ void __init noreturn __start_xen(unsigned long mbi_p)
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panic("Could not protect TXT memory regions\n");
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init_guest_cpuid();
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init_guest_msr_policy();
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init_guest_cpu_policies();
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if ( xen_cpuidle )
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xen_processor_pmbits |= XEN_PROCESSOR_PM_CX;
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@@ -12,6 +12,9 @@ extern struct cpu_policy pv_def_cpu_policy;
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extern struct cpu_policy hvm_max_cpu_policy;
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extern struct cpu_policy hvm_def_cpu_policy;
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/* Initialise the guest cpu_policy objects. */
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void init_guest_cpu_policies(void);
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/* Allocate and initialise a CPU policy suitable for the domain. */
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int init_domain_cpu_policy(struct domain *d);
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@@ -375,7 +375,6 @@ struct vcpu_msrs
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uint32_t dr_mask[4];
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};
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void init_guest_msr_policy(void);
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int init_vcpu_msr_policy(struct vcpu *v);
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/*
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