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x86: Remove return value from UPDATE_ENTRY
UPDATE_ENTRY/update_intpte always returns true since 1bc30c076a
"x86/mm: {paging, sh}_{cmpxchg, write}_guest_entry() cannot fault"
Signed-off-by: Kevin Lampis <kevin.lampis@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
1 parent
861e44a3ba
commit
5ec86c22b4
4 files changed
+45
-89
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+20
-54
@@ -2215,11 +2215,10 @@ static int mod_l1_entry(l1_pgentry_t *pl1e, l1_pgentry_t nl1e,
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/* Fast path for sufficiently-similar mappings. */
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if ( !l1e_has_changed(ol1e, nl1e, ~FASTPATH_FLAG_WHITELIST) )
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{
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rc = UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, pt_vcpu,
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update_flags);
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UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, pt_vcpu, update_flags);
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if ( page )
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put_page(page);
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return rc ? 0 : -EBUSY;
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return 0;
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}
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switch ( rc = get_page_from_l1e(nl1e, pt_dom, pg_dom) )
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@@ -2239,20 +2238,12 @@ static int mod_l1_entry(l1_pgentry_t *pl1e, l1_pgentry_t nl1e,
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if ( page )
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put_page(page);
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if ( unlikely(!UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, pt_vcpu,
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update_flags)) )
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{
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ol1e = nl1e;
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rc = -EBUSY;
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}
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UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, pt_vcpu, update_flags);
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}
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else if ( pv_l1tf_check_l1e(pt_dom, nl1e) )
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return -ERESTART;
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else if ( unlikely(!UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, pt_vcpu,
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update_flags)) )
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{
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return -EBUSY;
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}
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else
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UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, pt_vcpu, update_flags);
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put_page_from_l1e(ol1e, pt_dom);
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return rc;
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@@ -2295,28 +2286,19 @@ static int mod_l2_entry(l2_pgentry_t *pl2e,
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/* Fast path for sufficiently-similar mappings. */
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if ( !l2e_has_changed(ol2e, nl2e, ~FASTPATH_PDE_FLAG_WHITELIST) )
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{
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if ( UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, mfn, vcpu, update_flags) )
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return 0;
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return -EBUSY;
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UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, mfn, vcpu, update_flags);
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return 0;
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}
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if ( unlikely((rc = get_page_from_l2e(nl2e, mfn, d, 0)) < 0) )
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return rc;
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if ( unlikely(!UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, mfn, vcpu,
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update_flags)) )
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{
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ol2e = nl2e;
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rc = -EBUSY;
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}
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UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, mfn, vcpu, update_flags);
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}
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else if ( pv_l1tf_check_l2e(d, nl2e) )
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return -ERESTART;
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else if ( unlikely(!UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, mfn, vcpu,
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update_flags)) )
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{
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return -EBUSY;
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}
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else
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UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, mfn, vcpu, update_flags);
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put_page_from_l2e(ol2e, mfn, PTF_defer);
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@@ -2357,8 +2339,8 @@ static int mod_l3_entry(l3_pgentry_t *pl3e,
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/* Fast path for sufficiently-similar mappings. */
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if ( !l3e_has_changed(ol3e, nl3e, ~FASTPATH_PDE_FLAG_WHITELIST) )
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{
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rc = UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, mfn, vcpu, update_flags);
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return rc ? 0 : -EFAULT;
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UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, mfn, vcpu, update_flags);
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return 0;
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}
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rc = get_page_from_l3e(nl3e, mfn, d, 0);
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@@ -2366,20 +2348,12 @@ static int mod_l3_entry(l3_pgentry_t *pl3e,
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return rc;
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rc = 0;
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if ( unlikely(!UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, mfn, vcpu,
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update_flags)) )
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{
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ol3e = nl3e;
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rc = -EFAULT;
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}
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UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, mfn, vcpu, update_flags);
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}
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else if ( pv_l1tf_check_l3e(d, nl3e) )
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return -ERESTART;
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else if ( unlikely(!UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, mfn, vcpu,
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update_flags)) )
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{
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return -EFAULT;
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}
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else
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UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, mfn, vcpu, update_flags);
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put_page_from_l3e(ol3e, mfn, PTF_defer);
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return rc;
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@@ -2419,8 +2393,8 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
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/* Fast path for sufficiently-similar mappings. */
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if ( !l4e_has_changed(ol4e, nl4e, ~FASTPATH_PDE_FLAG_WHITELIST) )
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{
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rc = UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, mfn, vcpu, update_flags);
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return rc ? 0 : -EFAULT;
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UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, mfn, vcpu, update_flags);
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return 0;
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}
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rc = get_page_from_l4e(nl4e, mfn, d, 0);
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@@ -2428,20 +2402,12 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
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return rc;
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rc = 0;
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if ( unlikely(!UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, mfn, vcpu,
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update_flags)) )
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{
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ol4e = nl4e;
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rc = -EFAULT;
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}
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UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, mfn, vcpu, update_flags);
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}
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else if ( pv_l1tf_check_l4e(d, nl4e) )
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return -ERESTART;
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else if ( unlikely(!UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, mfn, vcpu,
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update_flags)) )
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{
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return -EFAULT;
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}
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else
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UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, mfn, vcpu, update_flags);
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put_page_from_l4e(ol4e, mfn, PTF_defer);
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return rc;
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@@ -98,18 +98,16 @@ int create_grant_pv_mapping(uint64_t addr, mfn_t frame,
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goto out_unlock;
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ol1e = *pl1e;
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if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
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{
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/*
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* We always create mappings in this path. However, our caller,
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* map_grant_ref(), only passes potentially non-zero cache_flags for
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* MMIO frames, so this path doesn't create non-coherent mappings of
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* RAM frames and there's no need to calculate PGT_non_coherent.
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*/
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ASSERT(!cache_flags || is_iomem_page(frame));
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UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0);
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/*
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* We always create mappings in this path. However, our caller,
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* map_grant_ref(), only passes potentially non-zero cache_flags for
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* MMIO frames, so this path doesn't create non-coherent mappings of
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* RAM frames and there's no need to calculate PGT_non_coherent.
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*/
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ASSERT(!cache_flags || is_iomem_page(frame));
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rc = GNTST_okay;
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}
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rc = GNTST_okay;
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out_unlock:
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page_unlock(page);
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@@ -165,10 +163,9 @@ static bool steal_linear_address(unsigned long linear, l1_pgentry_t *out)
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goto out_unlock;
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ol1e = *pl1e;
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okay = UPDATE_ENTRY(l1, pl1e, ol1e, l1e_empty(), gl1mfn, curr, 0);
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if ( okay )
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*out = ol1e;
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UPDATE_ENTRY(l1, pl1e, ol1e, l1e_empty(), gl1mfn, curr, 0);
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*out = ol1e;
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okay = true;
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out_unlock:
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page_unlock(page);
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@@ -293,19 +290,17 @@ int replace_grant_pv_mapping(uint64_t addr, mfn_t frame,
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"PTE flags %x for %"PRIx64" don't match grant (%x)\n",
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l1e_get_flags(ol1e), addr, grant_pte_flags);
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if ( UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0) )
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{
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/*
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* Generally, replace_grant_pv_mapping() is used to destroy mappings
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* (n1le = l1e_empty()), but it can be a present mapping on the
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* GNTABOP_unmap_and_replace path.
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*
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* In such cases, the PTE is fully transplanted from its old location
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* via steal_linear_addr(), so we need not perform PGT_non_coherent
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* checking here.
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*/
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rc = GNTST_okay;
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}
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UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, curr, 0);
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/*
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* Generally, replace_grant_pv_mapping() is used to destroy mappings
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* (n1le = l1e_empty()), but it can be a present mapping on the
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* GNTABOP_unmap_and_replace path.
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*
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* In such cases, the PTE is fully transplanted from its old location
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* via steal_linear_addr(), so we need not perform PGT_non_coherent
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* checking here.
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*/
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rc = GNTST_okay;
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out_unlock:
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page_unlock(page);
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@@ -67,13 +67,10 @@ static inline intpte_t paging_cmpxchg_guest_entry(
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/*
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* How to write an entry to the guest pagetables.
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* Returns false for failure (pointer not valid), true for success.
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*/
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static inline bool update_intpte(intpte_t *p, intpte_t old, intpte_t new,
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static inline void update_intpte(intpte_t *p, intpte_t old, intpte_t new,
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mfn_t mfn, struct vcpu *v, unsigned int flags)
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{
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bool rv = true;
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#ifndef PTE_UPDATE_WITH_CMPXCHG
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if ( !(flags & PTE_UPDATE_PRESERVE_AD) )
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paging_write_guest_entry(v, p, new, mfn);
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@@ -98,7 +95,6 @@ static inline bool update_intpte(intpte_t *p, intpte_t old, intpte_t new,
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old = t;
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}
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}
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return rv;
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}
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/*
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@@ -200,8 +200,7 @@ static int ptwr_emulated_update(unsigned long addr, intpte_t *p_old,
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else
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{
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ol1e = *pl1e;
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if ( !UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, mfn, v, 0) )
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BUG();
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UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, mfn, v, 0);
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}
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trace_ptwr_emulation(addr, nl1e);
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