x86emul: test harness adjustments for AVX512F S/G insns

There was an encoding mistake in the EVEX Disp8 test code, which was
benign (due to %rdx getting set to zero) to all non-vSIB tests as it
mistakenly encoded <disp8>(%rdx,%rdx) instead of <disp8>(%rdx,%riz). In
the vSIB case this meant <disp8>(%rdx,%zmm2) instead of the intended
<disp8>(%rdx,%zmm4).

Likewise the access count check wasn't entirely correct for the S/G
case: In the quad-word-index but dword-data case only half the number
of full vector elements get accessed.

As an unrelated change in the main test harness source file distinguish
the "n/a" messages by bitness.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
Jan Beulich committed 2019-07-04 17:43:57 +02:00
1 parent e8af03bf9a
commit 5f55389d69
2 files changed
+4 -3

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@@ -698,7 +698,7 @@ static void test_one(const struct test *test, enum vl vl,
instr[3] = evex.raw[2];
instr[4] = test->opc;
instr[5] = 0x44 | (test->ext << 3); /* ModR/M */
instr[6] = 0x12; /* SIB: base rDX, index none / xMM4 */
instr[6] = 0x22; /* SIB: base rDX, index none / xMM4 */
instr[7] = 1; /* Disp8 */
instr[8] = 0; /* immediate, if any */
@@ -718,7 +718,8 @@ static void test_one(const struct test *test, enum vl vl,
if ( accessed[i] )
goto fail;
for ( ; i < (test->scale == SC_vl ? vsz : esz) + (sg ? esz : vsz); ++i )
if ( accessed[i] != (sg ? vsz / esz : 1) )
if ( accessed[i] != (sg ? (vsz / esz) >> (test->opc & 1 & !evex.w)
: 1) )
goto fail;
for ( ; i < ARRAY_SIZE(accessed); ++i )
if ( accessed[i] )
+1 -1
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@@ -4260,7 +4260,7 @@ int main(int argc, char **argv)
if ( !blobs[j].size )
{
printf("%-39s n/a\n", blobs[j].name);
printf("%-39s n/a (%u-bit)\n", blobs[j].name, blobs[j].bitness);
continue;
}
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