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xen/arm: p2m: Only use isb() when it is necessary
The EL1 translation regime is out-of-context when running at EL2. This means the processor cannot speculate memory accesses using the registers associated to that regime. An isb() is only needed if Xen is going to use the translation regime before returning to the guest (exception returns will synchronize the context). Remove unnecessary isb() and document the ones left. Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Andrii Anisov <andrii_anisov@epam.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
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d0122fd7a4
commit
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1 file changed
+11
-6
+11
-6
@@ -106,16 +106,20 @@ void p2m_restore_state(struct vcpu *n)
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return;
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WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2);
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isb();
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WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1);
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isb();
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WRITE_SYSREG(n->arch.hcr_el2, HCR_EL2);
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isb();
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last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()];
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/*
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* While we are restoring an out-of-context translation regime
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* we still need to ensure:
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* - VTTBR_EL2 is synchronized before flushing the TLBs
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* - All registers for EL1 are synchronized before executing an AT
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* instructions targeting S1/S2.
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*/
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isb();
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/*
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* Flush local TLB for the domain to prevent wrong TLB translation
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* when running multiple vCPU of the same domain on a single pCPU.
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@@ -147,6 +151,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m)
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{
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local_irq_save(flags);
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WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2);
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/* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */
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isb();
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}
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@@ -155,6 +160,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m)
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if ( ovttbr != READ_SYSREG64(VTTBR_EL2) )
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{
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WRITE_SYSREG64(ovttbr, VTTBR_EL2);
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/* Ensure VTTBR_EL2 is back in place before continuing. */
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isb();
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local_irq_restore(flags);
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}
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@@ -1907,7 +1913,6 @@ static uint32_t __read_mostly vtcr;
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static void setup_virt_paging_one(void *data)
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{
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WRITE_SYSREG32(vtcr, VTCR_EL2);
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isb();
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}
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void __init setup_virt_paging(void)
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