x86/svm: Use flush-by-asid when available

AMD Fam15h processors introduced the flush-by-asid feature, for more fine
grain flushing purposes.

Flushing everything including ASID 0 (i.e. Xen context) is an an unnecesserily
large hammer, and never necessary in the context of guest TLBs needing
invalidating.

When available, use TLB_CTRL_FLUSH_ASID in preference to TLB_CTRL_FLUSH_ALL.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
This commit is contained in:
Andrew Cooper committed 2020-05-07 13:50:38 +01:00
1 parent 06e6f31768
commit 64b1da5a2f
2 files changed
+7 -3

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+6 -3
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@@ -18,6 +18,7 @@
#include <asm/amd.h>
#include <asm/hvm/nestedhvm.h>
#include <asm/hvm/svm/asid.h>
#include <asm/hvm/svm/svm.h>
void svm_asid_init(const struct cpuinfo_x86 *c)
{
@@ -47,15 +48,17 @@ void svm_asid_handle_vmrun(void)
if ( p_asid->asid == 0 )
{
vmcb_set_guest_asid(vmcb, 1);
/* TODO: investigate using TLB_CTRL_FLUSH_ASID here instead. */
vmcb->tlb_control = TLB_CTRL_FLUSH_ALL;
vmcb->tlb_control =
cpu_has_svm_flushbyasid ? TLB_CTRL_FLUSH_ASID : TLB_CTRL_FLUSH_ALL;
return;
}
if ( vmcb_get_guest_asid(vmcb) != p_asid->asid )
vmcb_set_guest_asid(vmcb, p_asid->asid);
vmcb->tlb_control = need_flush ? TLB_CTRL_FLUSH_ALL : TLB_CTRL_NO_FLUSH;
vmcb->tlb_control =
!need_flush ? TLB_CTRL_NO_FLUSH :
cpu_has_svm_flushbyasid ? TLB_CTRL_FLUSH_ASID : TLB_CTRL_FLUSH_ALL;
}
/*
+1
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@@ -79,6 +79,7 @@ extern u32 svm_feature_flags;
#define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML)
#define cpu_has_svm_nrips cpu_has_svm_feature(SVM_FEATURE_NRIPS)
#define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN)
#define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID)
#define cpu_has_svm_decode cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS)
#define cpu_has_svm_vgif cpu_has_svm_feature(SVM_FEATURE_VGIF)
#define cpu_has_pause_filter cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER)
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