IOMMU/x86: new command line option to suppress use of superpage mappings

Before actually enabling their use, provide a means to suppress it in
case of problems. Note that using the option can also affect the sharing
of page tables in the VT-d / EPT combination: If EPT would use large
page mappings but the option is in effect, page table sharing would be
suppressed (to properly fulfill the admin request).

Requested-by: Roger Pau Monné <roger.pau@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Paul Durrant <paul@xen.org>
This commit is contained in:
Jan Beulich committed 2022-07-25 15:34:55 +02:00
1 parent 5a991ad8a5
commit 6fc03330cd
5 files changed
+20 -4

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+7 -1
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@@ -1405,7 +1405,7 @@ detection of systems known to misbehave upon accesses to that port.
### iommu
= List of [ <bool>, verbose, debug, force, required, quarantine[=scratch-page],
sharept, intremap, intpost, crash-disable,
sharept, superpages, intremap, intpost, crash-disable,
snoop, qinval, igfx, amd-iommu-perdev-intremap,
dom0-{passthrough,strict} ]
@@ -1481,6 +1481,12 @@ boolean (e.g. `iommu=no`) can override this and leave the IOMMUs disabled.
This option is ignored on ARM, and the pagetables are always shared.
* The `superpages` boolean controls whether superpage mappings may be used
in IOMMU page tables. If using this option is necessary to fix an issue,
please report a bug.
This option is only valid on x86.
* The `intremap` boolean controls the Interrupt Remapping sub-feature, and
is active by default on compatible hardware. On x86 systems, the first
generation of IOMMUs only supported DMA remapping, and Interrupt Remapping
+1 -1
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@@ -132,7 +132,7 @@ extern bool untrusted_msi;
int pi_update_irte(const struct pi_desc *pi_desc, const struct pirq *pirq,
const uint8_t gvec);
extern bool iommu_non_coherent;
extern bool iommu_non_coherent, iommu_superpages;
static inline void iommu_sync_cache(const void *addr, unsigned int size)
{
+2
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@@ -88,6 +88,8 @@ static int __init cf_check parse_iommu_param(const char *s)
iommu_igfx = val;
else if ( (val = parse_boolean("qinval", s, ss)) >= 0 )
iommu_qinval = val;
else if ( (val = parse_boolean("superpages", s, ss)) >= 0 )
iommu_superpages = val;
#endif
else if ( (val = parse_boolean("verbose", s, ss)) >= 0 )
iommu_verbose = val;
+4 -2
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@@ -2213,8 +2213,10 @@ static bool __init vtd_ept_page_compatible(const struct vtd_iommu *iommu)
if ( rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP, ept_cap) != 0 )
return false;
return (ept_has_2mb(ept_cap) && opt_hap_2mb) <= cap_sps_2mb(vtd_cap) &&
(ept_has_1gb(ept_cap) && opt_hap_1gb) <= cap_sps_1gb(vtd_cap);
return (ept_has_2mb(ept_cap) && opt_hap_2mb) <=
(cap_sps_2mb(vtd_cap) && iommu_superpages) &&
(ept_has_1gb(ept_cap) && opt_hap_1gb) <=
(cap_sps_1gb(vtd_cap) && iommu_superpages);
}
static int cf_check intel_iommu_add_device(u8 devfn, struct pci_dev *pdev)
+6
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@@ -31,6 +31,7 @@
const struct iommu_init_ops *__initdata iommu_init_ops;
struct iommu_ops __ro_after_init iommu_ops;
bool __read_mostly iommu_non_coherent;
bool __initdata iommu_superpages = true;
enum iommu_intremap __read_mostly iommu_intremap = iommu_intremap_full;
@@ -104,8 +105,13 @@ int __init iommu_hardware_setup(void)
mask_IO_APIC_setup(ioapic_entries);
}
if ( !iommu_superpages )
iommu_ops.page_sizes &= PAGE_SIZE_4K;
rc = iommu_init_ops->setup();
ASSERT(iommu_superpages || iommu_ops.page_sizes == PAGE_SIZE_4K);
if ( ioapic_entries )
{
restore_IO_APIC_setup(ioapic_entries, rc);
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