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Eliminate i386 idt_table.
Add CONFIG_X86_NO_IDT to exclude all code which references the idt table. Make CONFIG_X86_F00F_BUG conditional on CONFIG_X86_NO_IDT. From: Jan Beulich <JBeulich@novell.com> Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
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@@ -1186,6 +1186,11 @@ config X86_SYSENTER
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depends on !X86_NO_TSS
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default y
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config X86_NO_IDT
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bool
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depends on X86_XEN
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default y
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config KTIME_SCALAR
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bool
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default y
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@@ -251,7 +251,7 @@ config X86_PPRO_FENCE
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config X86_F00F_BUG
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bool
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depends on M586MMX || M586TSC || M586 || M486 || M386
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depends on (M586MMX || M586TSC || M586 || M486 || M386) && !X86_NO_IDT
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default y
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config X86_WP_WORKS_OK
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@@ -94,19 +94,11 @@ ENTRY(stack_start)
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.long init_thread_union+THREAD_SIZE
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.long __BOOT_DS
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ready: .byte 0
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.globl idt_descr
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.globl cpu_gdt_descr
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ALIGN
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.word 0 # 32-bit align idt_desc.address
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idt_descr:
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.word IDT_ENTRIES*8-1 # idt contains 256 entries
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.long idt_table
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# boot GDT descriptor (later on used by CPU#0):
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.word 0 # 32 bit align gdt_desc.address
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.globl cpu_gdt_descr
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cpu_gdt_descr:
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.word GDT_SIZE
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.long cpu_gdt_table
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@@ -61,12 +61,14 @@ asmlinkage int system_call(void);
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/* Do we ignore FPU interrupts ? */
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char ignore_fpu_irq = 0;
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#ifndef CONFIG_X86_NO_IDT
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/*
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* The IDT has to be page-aligned to simplify the Pentium
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* F0 0F bug workaround.. We have a special link segment
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* for this.
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*/
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struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
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#endif
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asmlinkage void divide_error(void);
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asmlinkage void debug(void);
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