Eliminate i386 idt_table.

Add CONFIG_X86_NO_IDT to exclude all code which references the idt table.
Make CONFIG_X86_F00F_BUG conditional on CONFIG_X86_NO_IDT.

From: Jan Beulich <JBeulich@novell.com>
Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
This commit is contained in:
cl349@firebug.cl.cam.ac.uk committed 2006-02-20 17:22:00 +00:00
1 parent 9f4df136bd
commit 704aa39dff
4 files changed
+9 -10

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+5
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@@ -1186,6 +1186,11 @@ config X86_SYSENTER
depends on !X86_NO_TSS
default y
config X86_NO_IDT
bool
depends on X86_XEN
default y
config KTIME_SCALAR
bool
default y
+1 -1
View File
@@ -251,7 +251,7 @@ config X86_PPRO_FENCE
config X86_F00F_BUG
bool
depends on M586MMX || M586TSC || M586 || M486 || M386
depends on (M586MMX || M586TSC || M586 || M486 || M386) && !X86_NO_IDT
default y
config X86_WP_WORKS_OK
@@ -94,19 +94,11 @@ ENTRY(stack_start)
.long init_thread_union+THREAD_SIZE
.long __BOOT_DS
ready: .byte 0
.globl idt_descr
.globl cpu_gdt_descr
ALIGN
.word 0 # 32-bit align idt_desc.address
idt_descr:
.word IDT_ENTRIES*8-1 # idt contains 256 entries
.long idt_table
# boot GDT descriptor (later on used by CPU#0):
.word 0 # 32 bit align gdt_desc.address
.globl cpu_gdt_descr
cpu_gdt_descr:
.word GDT_SIZE
.long cpu_gdt_table
@@ -61,12 +61,14 @@ asmlinkage int system_call(void);
/* Do we ignore FPU interrupts ? */
char ignore_fpu_irq = 0;
#ifndef CONFIG_X86_NO_IDT
/*
* The IDT has to be page-aligned to simplify the Pentium
* F0 0F bug workaround.. We have a special link segment
* for this.
*/
struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
#endif
asmlinkage void divide_error(void);
asmlinkage void debug(void);
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