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tools/hvmloader: Move various helpers to being static inlines
The IO port, MSR, IO-APIC and LAPIC accessors compile typically to single or pairs of instructions, which is less overhead than even the stack manipulation to call the helpers. Move the implementations from util.c to being static inlines in util.h In addition, turn ioapic_base_address into a constant as it is never modified from 0xfec00000 (substantially shrinks the IO-APIC logic), and make use of the "A" constraint for WRMSR/RDMSR like we already do for RDTSC. Bloat-o-meter reports a net: add/remove: 0/13 grow/shrink: 0/18 up/down: 0/-790 (-790) No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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@@ -7,6 +7,7 @@
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#include <stdbool.h>
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#include <xen/xen.h>
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#include <xen/hvm/hvm_info_table.h>
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#include "config.h"
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#include "e820.h"
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#include <xen-tools/common-macros.h>
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@@ -54,28 +55,113 @@ static inline int test_and_clear_bit(int nr, volatile void *addr)
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}
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/* MSR access */
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void wrmsr(uint32_t idx, uint64_t v);
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uint64_t rdmsr(uint32_t idx);
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static inline void wrmsr(uint32_t idx, uint64_t v)
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{
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asm volatile ( "wrmsr" :: "c" (idx), "A" (v) );
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}
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static inline uint64_t rdmsr(uint32_t idx)
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{
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uint64_t res;
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asm volatile ( "rdmsr" : "=A" (res) : "c" (idx) );
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return res;
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}
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/* I/O output */
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void outb(uint16_t addr, uint8_t val);
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void outw(uint16_t addr, uint16_t val);
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void outl(uint16_t addr, uint32_t val);
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static inline void outb(uint16_t port, uint8_t val)
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{
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asm volatile ( "outb %[val], %[port]"
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:
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: [port] "Nd" (port),
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[val] "a" (val)
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: "memory" );
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}
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static inline void outw(uint16_t port, uint16_t val)
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{
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asm volatile ( "outw %[val], %[port]"
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:
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: [port] "Nd" (port),
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[val] "a" (val)
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: "memory" );
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}
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static inline void outl(uint16_t port, uint32_t val)
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{
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asm volatile ( "outl %[val], %[port]"
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:
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: [port] "Nd" (port),
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[val] "a" (val)
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: "memory" );
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}
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/* I/O input */
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uint8_t inb(uint16_t addr);
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uint16_t inw(uint16_t addr);
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uint32_t inl(uint16_t addr);
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static inline uint8_t inb(uint16_t port)
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{
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uint8_t val;
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asm volatile ( "inb %[port], %[val]"
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: [val] "=a" (val)
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: [port] "Nd" (port)
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: "memory" );
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return val;
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}
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static inline uint16_t inw(uint16_t port)
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{
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uint16_t val;
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asm volatile ( "inw %[port], %[val]"
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: [val] "=a" (val)
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: [port] "Nd" (port)
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: "memory" );
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return val;
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}
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static inline uint32_t inl(uint16_t port)
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{
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uint32_t val;
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asm volatile ( "inl %[port], %[val]"
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: [val] "=a" (val)
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: [port] "Nd" (port)
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: "memory" );
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return val;
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}
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/* CMOS access */
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uint8_t cmos_inb(uint8_t idx);
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void cmos_outb(uint8_t idx, uint8_t val);
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/* APIC access */
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uint32_t ioapic_read(uint32_t reg);
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void ioapic_write(uint32_t reg, uint32_t val);
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uint32_t lapic_read(uint32_t reg);
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void lapic_write(uint32_t reg, uint32_t val);
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#define IOAPIC_BASE_ADDRESS 0xfec00000
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static inline uint32_t ioapic_read(uint32_t reg)
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{
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*(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x00) = reg;
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return *(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x10);
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}
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static inline void ioapic_write(uint32_t reg, uint32_t val)
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{
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*(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x00) = reg;
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*(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x10) = val;
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}
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#define LAPIC_BASE_ADDRESS 0xfee00000
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static inline uint32_t lapic_read(uint32_t reg)
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{
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return *(volatile uint32_t *)(LAPIC_BASE_ADDRESS + reg);
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}
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static inline void lapic_write(uint32_t reg, uint32_t val)
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{
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*(volatile uint32_t *)(LAPIC_BASE_ADDRESS + reg) = val;
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}
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/* PCI access */
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uint32_t pci_read(uint32_t devfn, uint32_t reg, uint32_t len);
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