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vmx: add VMX RDTSC(P) scaling support
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> Acked-by: Jan Beulich <jbeulich@suse.com> Acked-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
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aea18575ee
commit
7a08a18f94
5 files changed
+42
-3
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@@ -2124,6 +2124,9 @@ static int hvm_load_cpu_ctxt(struct domain *d, hvm_domain_context_t *h)
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if ( hvm_funcs.load_cpu_ctxt(v, &ctxt) < 0 )
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return -EINVAL;
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if ( hvm_funcs.tsc_scaling.setup )
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hvm_funcs.tsc_scaling.setup(v);
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v->arch.hvm_vcpu.msr_tsc_aux = ctxt.msr_tsc_aux;
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hvm_set_guest_tsc_fixed(v, ctxt.tsc, d->arch.hvm_domain.sync_tsc);
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@@ -5639,6 +5642,9 @@ void hvm_vcpu_reset_state(struct vcpu *v, uint16_t cs, uint16_t ip)
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hvm_set_segment_register(v, x86_seg_gdtr, ®);
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hvm_set_segment_register(v, x86_seg_idtr, ®);
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if ( hvm_funcs.tsc_scaling.setup )
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hvm_funcs.tsc_scaling.setup(v);
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/* Sync AP's TSC with BSP's. */
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v->arch.hvm_vcpu.cache_tsc_offset =
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v->domain->vcpu[0]->arch.hvm_vcpu.cache_tsc_offset;
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@@ -149,6 +149,7 @@ static void __init vmx_display_features(void)
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P(cpu_has_vmx_vmfunc, "VM Functions");
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P(cpu_has_vmx_virt_exceptions, "Virtualisation Exceptions");
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P(cpu_has_vmx_pml, "Page Modification Logging");
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P(cpu_has_vmx_tsc_scaling, "TSC Scaling");
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#undef P
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if ( !printed )
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@@ -243,7 +244,8 @@ static int vmx_init_vmcs_config(void)
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SECONDARY_EXEC_ENABLE_VM_FUNCTIONS |
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SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS |
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SECONDARY_EXEC_XSAVES |
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SECONDARY_EXEC_PCOMMIT);
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SECONDARY_EXEC_PCOMMIT |
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SECONDARY_EXEC_TSC_SCALING);
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rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
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if ( _vmx_misc_cap & VMX_MISC_VMWRITE_ALL )
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opt |= SECONDARY_EXEC_ENABLE_VMCS_SHADOWING;
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@@ -999,7 +1001,7 @@ static int construct_vmcs(struct vcpu *v)
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__vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_pin_based_exec_control);
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v->arch.hvm_vmx.exec_control = vmx_cpu_based_exec_control;
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if ( d->arch.vtsc )
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if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling )
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v->arch.hvm_vmx.exec_control |= CPU_BASED_RDTSC_EXITING;
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v->arch.hvm_vmx.secondary_exec_control = vmx_secondary_exec_control;
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@@ -1287,6 +1289,9 @@ static int construct_vmcs(struct vcpu *v)
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if ( cpu_has_vmx_xsaves )
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__vmwrite(XSS_EXIT_BITMAP, 0);
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if ( cpu_has_vmx_tsc_scaling )
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__vmwrite(TSC_MULTIPLIER, d->arch.hvm_domain.tsc_scaling_ratio);
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vmx_vmcs_exit(v);
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/* PVH: paging mode is updated by arch_set_info_guest(). */
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@@ -1869,7 +1874,8 @@ void vmcs_dump_vcpu(struct vcpu *v)
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vmr32(VM_EXIT_REASON), vmr(EXIT_QUALIFICATION));
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printk("IDTVectoring: info=%08x errcode=%08x\n",
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vmr32(IDT_VECTORING_INFO), vmr32(IDT_VECTORING_ERROR_CODE));
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printk("TSC Offset = 0x%016lx\n", vmr(TSC_OFFSET));
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printk("TSC Offset = 0x%016lx TSC Multiplier = 0x%016lx\n",
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vmr(TSC_OFFSET), vmr(TSC_MULTIPLIER));
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if ( (v->arch.hvm_vmx.exec_control & CPU_BASED_TPR_SHADOW) ||
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(vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) )
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printk("TPR Threshold = 0x%02x PostedIntrVec = 0x%02x\n",
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@@ -1122,6 +1122,16 @@ static void vmx_handle_cd(struct vcpu *v, unsigned long value)
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}
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}
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static void vmx_setup_tsc_scaling(struct vcpu *v)
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{
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if ( !hvm_tsc_scaling_supported || v->domain->arch.vtsc )
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return;
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vmx_vmcs_enter(v);
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__vmwrite(TSC_MULTIPLIER, hvm_tsc_scaling_ratio(v->domain));
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vmx_vmcs_exit(v);
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}
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static void vmx_set_tsc_offset(struct vcpu *v, u64 offset, u64 at_tsc)
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{
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vmx_vmcs_enter(v);
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@@ -2014,6 +2024,10 @@ static struct hvm_function_table __initdata vmx_function_table = {
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.altp2m_vcpu_update_vmfunc_ve = vmx_vcpu_update_vmfunc_ve,
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.altp2m_vcpu_emulate_ve = vmx_vcpu_emulate_ve,
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.altp2m_vcpu_emulate_vmfunc = vmx_vcpu_emulate_vmfunc,
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.tsc_scaling = {
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.max_ratio = VMX_TSC_MULTIPLIER_MAX,
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.setup = vmx_setup_tsc_scaling,
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},
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};
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/* Handle VT-d posted-interrupt when VCPU is running. */
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@@ -2118,6 +2132,9 @@ const struct hvm_function_table * __init start_vmx(void)
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&& cpu_has_vmx_secondary_exec_control )
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vmx_function_table.pvh_supported = 1;
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if ( cpu_has_vmx_tsc_scaling )
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vmx_function_table.tsc_scaling.ratio_frac_bits = 48;
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setup_vmcs_dump();
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return &vmx_function_table;
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@@ -231,6 +231,9 @@ struct hvm_function_table {
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uint8_t ratio_frac_bits;
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/* maximum-allowed TSC scaling ratio */
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uint64_t max_ratio;
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/* Architecture function to setup TSC scaling ratio */
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void (*setup)(struct vcpu *v);
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} tsc_scaling;
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};
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@@ -237,6 +237,7 @@ extern u32 vmx_vmentry_control;
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#define SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS 0x00040000
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#define SECONDARY_EXEC_XSAVES 0x00100000
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#define SECONDARY_EXEC_PCOMMIT 0x00200000
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#define SECONDARY_EXEC_TSC_SCALING 0x02000000
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extern u32 vmx_secondary_exec_control;
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#define VMX_EPT_EXEC_ONLY_SUPPORTED 0x00000001
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@@ -259,6 +260,8 @@ extern u64 vmx_ept_vpid_cap;
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#define VMX_MISC_CR3_TARGET 0x01ff0000
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#define VMX_MISC_VMWRITE_ALL 0x20000000
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#define VMX_TSC_MULTIPLIER_MAX 0xffffffffffffffffULL
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#define cpu_has_wbinvd_exiting \
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(vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING)
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#define cpu_has_vmx_virtualize_apic_accesses \
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@@ -306,6 +309,9 @@ extern u64 vmx_ept_vpid_cap;
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(vmx_secondary_exec_control & SECONDARY_EXEC_XSAVES)
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#define cpu_has_vmx_pcommit \
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(vmx_secondary_exec_control & SECONDARY_EXEC_PCOMMIT)
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#define cpu_has_vmx_tsc_scaling \
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(vmx_secondary_exec_control & SECONDARY_EXEC_TSC_SCALING)
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#define VMCS_RID_TYPE_MASK 0x80000000
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/* GUEST_INTERRUPTIBILITY_INFO flags. */
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@@ -380,6 +386,7 @@ enum vmcs_field {
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VMWRITE_BITMAP = 0x00002028,
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VIRT_EXCEPTION_INFO = 0x0000202a,
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XSS_EXIT_BITMAP = 0x0000202c,
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TSC_MULTIPLIER = 0x00002032,
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GUEST_PHYSICAL_ADDRESS = 0x00002400,
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VMCS_LINK_POINTER = 0x00002800,
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GUEST_IA32_DEBUGCTL = 0x00002802,
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