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dm_op: convert HVMOP_set_pci_intx_level, HVMOP_set_isa_irq_level, and...
... HVMOP_set_pci_link_route
These HVMOPs were exposed to guests so their definitions need to be
preserved for compatibility. This patch therefore updates
__XEN_LATEST_INTERFACE_VERSION__ to 0x00040900 and makes the HVMOP
defintions conditional on __XEN_INTERFACE_VERSION__ less than that value.
NOTE: This patch also widens the 'domain' parameter of
xc_hvm_set_pci_intx_level() from a uint8_t to a uint16_t.
Suggested-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
1 parent
86ad4d054a
commit
7b2e218fd6
16 files changed
+164
-260
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@@ -57,8 +57,8 @@ define(`create_domain_common', `
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allow $1 $2:shadow enable;
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allow $1 $2:mmu { map_read map_write adjust memorymap physmap pinpage mmuext_op updatemp };
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allow $1 $2:grant setup;
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allow $1 $2:hvm { cacheattr getparam hvmctl irqlevel pciroute sethvmc
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setparam pcilevel nested altp2mhvm altp2mhvm_op send_irq };
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allow $1 $2:hvm { cacheattr getparam hvmctl sethvmc
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setparam nested altp2mhvm altp2mhvm_op send_irq };
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')
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# create_domain(priv, target)
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@@ -93,7 +93,7 @@ define(`manage_domain', `
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# (inbound migration is the same as domain creation)
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define(`migrate_domain_out', `
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allow $1 domxen_t:mmu map_read;
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allow $1 $2:hvm { gethvmc getparam irqlevel };
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allow $1 $2:hvm { gethvmc getparam };
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allow $1 $2:mmu { stat pageinfo map_read };
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allow $1 $2:domain { getaddrsize getvcpucontext pause destroy };
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allow $1 $2:domain2 gettsc;
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@@ -151,7 +151,7 @@ define(`device_model', `
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allow $1 $2_target:domain { getdomaininfo shutdown };
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allow $1 $2_target:mmu { map_read map_write adjust physmap target_hack };
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allow $1 $2_target:hvm { getparam setparam hvmctl irqlevel pciroute pcilevel cacheattr send_irq dm };
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allow $1 $2_target:hvm { getparam setparam hvmctl cacheattr send_irq dm };
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')
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# make_device_model(priv, dm_dom, hvm_dom)
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@@ -1594,7 +1594,7 @@ int xc_physdev_unmap_pirq(xc_interface *xch,
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int xc_hvm_set_pci_intx_level(
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xc_interface *xch, domid_t dom,
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uint8_t domain, uint8_t bus, uint8_t device, uint8_t intx,
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uint16_t domain, uint8_t bus, uint8_t device, uint8_t intx,
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unsigned int level);
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int xc_hvm_set_isa_irq_level(
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xc_interface *xch, domid_t dom,
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+28
-55
@@ -470,33 +470,24 @@ int xc_getcpuinfo(xc_interface *xch, int max_cpus,
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int xc_hvm_set_pci_intx_level(
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xc_interface *xch, domid_t dom,
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uint8_t domain, uint8_t bus, uint8_t device, uint8_t intx,
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uint16_t domain, uint8_t bus, uint8_t device, uint8_t intx,
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unsigned int level)
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{
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DECLARE_HYPERCALL_BUFFER(struct xen_hvm_set_pci_intx_level, arg);
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int rc;
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struct xen_dm_op op;
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struct xen_dm_op_set_pci_intx_level *data;
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arg = xc_hypercall_buffer_alloc(xch, arg, sizeof(*arg));
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if ( arg == NULL )
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{
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PERROR("Could not allocate memory for xc_hvm_set_pci_intx_level hypercall");
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return -1;
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}
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memset(&op, 0, sizeof(op));
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arg->domid = dom;
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arg->domain = domain;
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arg->bus = bus;
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arg->device = device;
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arg->intx = intx;
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arg->level = level;
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op.op = XEN_DMOP_set_pci_intx_level;
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data = &op.u.set_pci_intx_level;
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rc = xencall2(xch->xcall, __HYPERVISOR_hvm_op,
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HVMOP_set_pci_intx_level,
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HYPERCALL_BUFFER_AS_ARG(arg));
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data->domain = domain;
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data->bus = bus;
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data->device = device;
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data->intx = intx;
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data->level = level;
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xc_hypercall_buffer_free(xch, arg);
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return rc;
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return do_dm_op(xch, dom, 1, &op, sizeof(op));
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}
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int xc_hvm_set_isa_irq_level(
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@@ -504,53 +495,35 @@ int xc_hvm_set_isa_irq_level(
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uint8_t isa_irq,
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unsigned int level)
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{
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DECLARE_HYPERCALL_BUFFER(struct xen_hvm_set_isa_irq_level, arg);
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int rc;
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struct xen_dm_op op;
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struct xen_dm_op_set_isa_irq_level *data;
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arg = xc_hypercall_buffer_alloc(xch, arg, sizeof(*arg));
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if ( arg == NULL )
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{
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PERROR("Could not allocate memory for xc_hvm_set_isa_irq_level hypercall");
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return -1;
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}
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memset(&op, 0, sizeof(op));
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arg->domid = dom;
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arg->isa_irq = isa_irq;
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arg->level = level;
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op.op = XEN_DMOP_set_isa_irq_level;
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data = &op.u.set_isa_irq_level;
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rc = xencall2(xch->xcall, __HYPERVISOR_hvm_op,
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HVMOP_set_isa_irq_level,
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HYPERCALL_BUFFER_AS_ARG(arg));
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data->isa_irq = isa_irq;
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data->level = level;
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xc_hypercall_buffer_free(xch, arg);
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return rc;
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return do_dm_op(xch, dom, 1, &op, sizeof(op));
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}
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int xc_hvm_set_pci_link_route(
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xc_interface *xch, domid_t dom, uint8_t link, uint8_t isa_irq)
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{
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DECLARE_HYPERCALL_BUFFER(struct xen_hvm_set_pci_link_route, arg);
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int rc;
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struct xen_dm_op op;
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struct xen_dm_op_set_pci_link_route *data;
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arg = xc_hypercall_buffer_alloc(xch, arg, sizeof(*arg));
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if ( arg == NULL )
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{
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PERROR("Could not allocate memory for xc_hvm_set_pci_link_route hypercall");
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return -1;
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}
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memset(&op, 0, sizeof(op));
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arg->domid = dom;
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arg->link = link;
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arg->isa_irq = isa_irq;
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op.op = XEN_DMOP_set_pci_link_route;
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data = &op.u.set_pci_link_route;
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rc = xencall2(xch->xcall, __HYPERVISOR_hvm_op,
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HVMOP_set_pci_link_route,
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HYPERCALL_BUFFER_AS_ARG(arg));
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data->link = link;
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data->isa_irq = isa_irq;
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xc_hypercall_buffer_free(xch, arg);
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return rc;
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return do_dm_op(xch, dom, 1, &op, sizeof(op));
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}
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int xc_hvm_inject_msi(
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@@ -74,6 +74,49 @@ static int track_dirty_vram(struct domain *d, xen_pfn_t first_pfn,
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hap_track_dirty_vram(d, first_pfn, nr, buf->h);
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}
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static int set_pci_intx_level(struct domain *d, uint16_t domain,
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uint8_t bus, uint8_t device,
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uint8_t intx, uint8_t level)
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{
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if ( domain != 0 || bus != 0 || device > 0x1f || intx > 3 )
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return -EINVAL;
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switch ( level )
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{
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case 0:
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hvm_pci_intx_deassert(d, device, intx);
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break;
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case 1:
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hvm_pci_intx_assert(d, device, intx);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int set_isa_irq_level(struct domain *d, uint8_t isa_irq,
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uint8_t level)
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{
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if ( isa_irq > 15 )
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return -EINVAL;
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switch ( level )
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{
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case 0:
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hvm_isa_irq_deassert(d, isa_irq);
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break;
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case 1:
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hvm_isa_irq_assert(d, isa_irq);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int dm_op(domid_t domid,
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unsigned int nr_bufs,
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xen_dm_op_buf_t bufs[])
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@@ -211,6 +254,35 @@ static int dm_op(domid_t domid,
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break;
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}
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case XEN_DMOP_set_pci_intx_level:
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{
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const struct xen_dm_op_set_pci_intx_level *data =
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&op.u.set_pci_intx_level;
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rc = set_pci_intx_level(d, data->domain, data->bus,
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data->device, data->intx,
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data->level);
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break;
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}
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case XEN_DMOP_set_isa_irq_level:
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{
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const struct xen_dm_op_set_isa_irq_level *data =
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&op.u.set_isa_irq_level;
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rc = set_isa_irq_level(d, data->isa_irq, data->level);
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break;
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}
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case XEN_DMOP_set_pci_link_route:
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{
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const struct xen_dm_op_set_pci_link_route *data =
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&op.u.set_pci_link_route;
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rc = hvm_set_pci_link_route(d, data->link, data->isa_irq);
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break;
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}
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default:
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rc = -EOPNOTSUPP;
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break;
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@@ -233,6 +305,9 @@ CHECK_dm_op_ioreq_server_range;
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CHECK_dm_op_set_ioreq_server_state;
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CHECK_dm_op_destroy_ioreq_server;
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CHECK_dm_op_track_dirty_vram;
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CHECK_dm_op_set_pci_intx_level;
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CHECK_dm_op_set_isa_irq_level;
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CHECK_dm_op_set_pci_link_route;
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#define MAX_NR_BUFS 2
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@@ -4049,50 +4049,6 @@ void hvm_hypercall_page_initialise(struct domain *d,
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hvm_funcs.init_hypercall_page(d, hypercall_page);
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}
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static int hvmop_set_pci_intx_level(
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XEN_GUEST_HANDLE_PARAM(xen_hvm_set_pci_intx_level_t) uop)
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{
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struct xen_hvm_set_pci_intx_level op;
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struct domain *d;
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int rc;
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if ( copy_from_guest(&op, uop, 1) )
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return -EFAULT;
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if ( (op.domain > 0) || (op.bus > 0) || (op.device > 31) || (op.intx > 3) )
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return -EINVAL;
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rc = rcu_lock_remote_domain_by_id(op.domid, &d);
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if ( rc != 0 )
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return rc;
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rc = -EINVAL;
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if ( !is_hvm_domain(d) )
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goto out;
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rc = xsm_hvm_set_pci_intx_level(XSM_DM_PRIV, d);
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if ( rc )
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goto out;
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rc = 0;
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switch ( op.level )
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{
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case 0:
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hvm_pci_intx_deassert(d, op.device, op.intx);
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break;
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case 1:
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hvm_pci_intx_assert(d, op.device, op.intx);
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break;
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default:
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rc = -EINVAL;
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break;
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}
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out:
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rcu_unlock_domain(d);
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return rc;
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}
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void hvm_vcpu_reset_state(struct vcpu *v, uint16_t cs, uint16_t ip)
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{
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struct domain *d = v->domain;
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@@ -4236,83 +4192,6 @@ static void hvm_s3_resume(struct domain *d)
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}
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}
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static int hvmop_set_isa_irq_level(
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XEN_GUEST_HANDLE_PARAM(xen_hvm_set_isa_irq_level_t) uop)
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{
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struct xen_hvm_set_isa_irq_level op;
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struct domain *d;
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int rc;
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if ( copy_from_guest(&op, uop, 1) )
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return -EFAULT;
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if ( op.isa_irq > 15 )
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return -EINVAL;
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rc = rcu_lock_remote_domain_by_id(op.domid, &d);
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if ( rc != 0 )
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return rc;
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rc = -EINVAL;
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if ( !is_hvm_domain(d) )
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goto out;
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rc = xsm_hvm_set_isa_irq_level(XSM_DM_PRIV, d);
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if ( rc )
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goto out;
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rc = 0;
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switch ( op.level )
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{
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case 0:
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hvm_isa_irq_deassert(d, op.isa_irq);
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break;
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case 1:
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hvm_isa_irq_assert(d, op.isa_irq);
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break;
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default:
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rc = -EINVAL;
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break;
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}
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out:
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rcu_unlock_domain(d);
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return rc;
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}
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static int hvmop_set_pci_link_route(
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XEN_GUEST_HANDLE_PARAM(xen_hvm_set_pci_link_route_t) uop)
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{
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struct xen_hvm_set_pci_link_route op;
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struct domain *d;
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int rc;
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if ( copy_from_guest(&op, uop, 1) )
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return -EFAULT;
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if ( (op.link > 3) || (op.isa_irq > 15) )
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return -EINVAL;
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rc = rcu_lock_remote_domain_by_id(op.domid, &d);
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if ( rc != 0 )
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return rc;
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rc = -EINVAL;
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if ( !is_hvm_domain(d) )
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goto out;
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rc = xsm_hvm_set_pci_link_route(XSM_DM_PRIV, d);
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if ( rc )
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goto out;
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rc = 0;
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hvm_set_pci_link_route(d, op.link, op.isa_irq);
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out:
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rcu_unlock_domain(d);
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return rc;
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}
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static int hvmop_inject_msi(
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XEN_GUEST_HANDLE_PARAM(xen_hvm_inject_msi_t) uop)
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{
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@@ -5114,26 +4993,11 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PARAM(void) arg)
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guest_handle_cast(arg, xen_hvm_param_t));
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break;
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case HVMOP_set_pci_intx_level:
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rc = hvmop_set_pci_intx_level(
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guest_handle_cast(arg, xen_hvm_set_pci_intx_level_t));
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break;
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case HVMOP_set_isa_irq_level:
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rc = hvmop_set_isa_irq_level(
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guest_handle_cast(arg, xen_hvm_set_isa_irq_level_t));
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break;
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case HVMOP_inject_msi:
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rc = hvmop_inject_msi(
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guest_handle_cast(arg, xen_hvm_inject_msi_t));
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break;
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case HVMOP_set_pci_link_route:
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rc = hvmop_set_pci_link_route(
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guest_handle_cast(arg, xen_hvm_set_pci_link_route_t));
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break;
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case HVMOP_flush_tlbs:
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rc = guest_handle_is_null(arg) ? hvmop_flush_tlb_all() : -EINVAL;
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break;
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@@ -229,13 +229,14 @@ void hvm_assert_evtchn_irq(struct vcpu *v)
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hvm_set_callback_irq_level(v);
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}
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void hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq)
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int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq)
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{
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struct hvm_irq *hvm_irq = &d->arch.hvm_domain.irq;
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u8 old_isa_irq;
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int i;
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ASSERT((link <= 3) && (isa_irq <= 15));
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if ( (link > 3) || (isa_irq > 15) )
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return -EINVAL;
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spin_lock(&d->arch.hvm_domain.irq_lock);
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@@ -273,6 +274,8 @@ void hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq)
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dprintk(XENLOG_G_INFO, "Dom%u PCI link %u changed %u -> %u\n",
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d->domain_id, link, old_isa_irq, isa_irq);
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return 0;
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}
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|
||||
int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data)
|
||||
|
||||
@@ -194,6 +194,45 @@ struct xen_dm_op_track_dirty_vram {
|
||||
uint64_aligned_t first_pfn;
|
||||
};
|
||||
|
||||
/*
|
||||
* XEN_DMOP_set_pci_intx_level: Set the logical level of one of a domain's
|
||||
* PCI INTx pins.
|
||||
*/
|
||||
#define XEN_DMOP_set_pci_intx_level 8
|
||||
|
||||
struct xen_dm_op_set_pci_intx_level {
|
||||
/* IN - PCI INTx identification (domain:bus:device:intx) */
|
||||
uint16_t domain;
|
||||
uint8_t bus, device, intx;
|
||||
/* IN - Level: 0 -> deasserted, 1 -> asserted */
|
||||
uint8_t level;
|
||||
};
|
||||
|
||||
/*
|
||||
* XEN_DMOP_set_isa_irq_level: Set the logical level of a one of a domain's
|
||||
* ISA IRQ lines.
|
||||
*/
|
||||
#define XEN_DMOP_set_isa_irq_level 9
|
||||
|
||||
struct xen_dm_op_set_isa_irq_level {
|
||||
/* IN - ISA IRQ (0-15) */
|
||||
uint8_t isa_irq;
|
||||
/* IN - Level: 0 -> deasserted, 1 -> asserted */
|
||||
uint8_t level;
|
||||
};
|
||||
|
||||
/*
|
||||
* XEN_DMOP_set_pci_link_route: Map a PCI INTx line to an IRQ line.
|
||||
*/
|
||||
#define XEN_DMOP_set_pci_link_route 10
|
||||
|
||||
struct xen_dm_op_set_pci_link_route {
|
||||
/* PCI INTx line (0-3) */
|
||||
uint8_t link;
|
||||
/* ISA IRQ (1-15) or 0 -> disable link */
|
||||
uint8_t isa_irq;
|
||||
};
|
||||
|
||||
struct xen_dm_op {
|
||||
uint32_t op;
|
||||
uint32_t pad;
|
||||
@@ -205,6 +244,9 @@ struct xen_dm_op {
|
||||
struct xen_dm_op_set_ioreq_server_state set_ioreq_server_state;
|
||||
struct xen_dm_op_destroy_ioreq_server destroy_ioreq_server;
|
||||
struct xen_dm_op_track_dirty_vram track_dirty_vram;
|
||||
struct xen_dm_op_set_pci_intx_level set_pci_intx_level;
|
||||
struct xen_dm_op_set_isa_irq_level set_isa_irq_level;
|
||||
struct xen_dm_op_set_pci_link_route set_pci_link_route;
|
||||
} u;
|
||||
};
|
||||
|
||||
|
||||
@@ -38,6 +38,8 @@ struct xen_hvm_param {
|
||||
typedef struct xen_hvm_param xen_hvm_param_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_hvm_param_t);
|
||||
|
||||
#if __XEN_INTERFACE_VERSION__ < 0x00040900
|
||||
|
||||
/* Set the logical level of one of a domain's PCI INTx wires. */
|
||||
#define HVMOP_set_pci_intx_level 2
|
||||
struct xen_hvm_set_pci_intx_level {
|
||||
@@ -76,6 +78,8 @@ struct xen_hvm_set_pci_link_route {
|
||||
typedef struct xen_hvm_set_pci_link_route xen_hvm_set_pci_link_route_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_hvm_set_pci_link_route_t);
|
||||
|
||||
#endif /* __XEN_INTERFACE_VERSION__ < 0x00040900 */
|
||||
|
||||
/* Flushes all VCPU TLBs: @arg must be NULL. */
|
||||
#define HVMOP_flush_tlbs 5
|
||||
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
#ifndef __XEN_PUBLIC_XEN_COMPAT_H__
|
||||
#define __XEN_PUBLIC_XEN_COMPAT_H__
|
||||
|
||||
#define __XEN_LATEST_INTERFACE_VERSION__ 0x00040800
|
||||
#define __XEN_LATEST_INTERFACE_VERSION__ 0x00040900
|
||||
|
||||
#if defined(__XEN__) || defined(__XEN_TOOLS__)
|
||||
/* Xen is built with matching headers and implements the latest interface. */
|
||||
|
||||
@@ -122,7 +122,7 @@ void hvm_isa_irq_assert(
|
||||
void hvm_isa_irq_deassert(
|
||||
struct domain *d, unsigned int isa_irq);
|
||||
|
||||
void hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq);
|
||||
int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq);
|
||||
|
||||
int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data);
|
||||
|
||||
|
||||
@@ -62,6 +62,9 @@
|
||||
? dm_op_get_ioreq_server_info hvm/dm_op.h
|
||||
? dm_op_ioreq_server_range hvm/dm_op.h
|
||||
? dm_op_set_ioreq_server_state hvm/dm_op.h
|
||||
? dm_op_set_isa_irq_level hvm/dm_op.h
|
||||
? dm_op_set_pci_intx_level hvm/dm_op.h
|
||||
? dm_op_set_pci_link_route hvm/dm_op.h
|
||||
? dm_op_track_dirty_vram hvm/dm_op.h
|
||||
? vcpu_hvm_context hvm/hvm_vcpu.h
|
||||
? vcpu_hvm_x86_32 hvm/hvm_vcpu.h
|
||||
|
||||
@@ -610,24 +610,6 @@ static XSM_INLINE int xsm_shadow_control(XSM_DEFAULT_ARG struct domain *d, uint3
|
||||
return xsm_default_action(action, current->domain, d);
|
||||
}
|
||||
|
||||
static XSM_INLINE int xsm_hvm_set_pci_intx_level(XSM_DEFAULT_ARG struct domain *d)
|
||||
{
|
||||
XSM_ASSERT_ACTION(XSM_DM_PRIV);
|
||||
return xsm_default_action(action, current->domain, d);
|
||||
}
|
||||
|
||||
static XSM_INLINE int xsm_hvm_set_isa_irq_level(XSM_DEFAULT_ARG struct domain *d)
|
||||
{
|
||||
XSM_ASSERT_ACTION(XSM_DM_PRIV);
|
||||
return xsm_default_action(action, current->domain, d);
|
||||
}
|
||||
|
||||
static XSM_INLINE int xsm_hvm_set_pci_link_route(XSM_DEFAULT_ARG struct domain *d)
|
||||
{
|
||||
XSM_ASSERT_ACTION(XSM_DM_PRIV);
|
||||
return xsm_default_action(action, current->domain, d);
|
||||
}
|
||||
|
||||
static XSM_INLINE int xsm_hvm_inject_msi(XSM_DEFAULT_ARG struct domain *d)
|
||||
{
|
||||
XSM_ASSERT_ACTION(XSM_DM_PRIV);
|
||||
|
||||
@@ -162,9 +162,6 @@ struct xsm_operations {
|
||||
#ifdef CONFIG_X86
|
||||
int (*do_mca) (void);
|
||||
int (*shadow_control) (struct domain *d, uint32_t op);
|
||||
int (*hvm_set_pci_intx_level) (struct domain *d);
|
||||
int (*hvm_set_isa_irq_level) (struct domain *d);
|
||||
int (*hvm_set_pci_link_route) (struct domain *d);
|
||||
int (*hvm_inject_msi) (struct domain *d);
|
||||
int (*mem_sharing_op) (struct domain *d, struct domain *cd, int op);
|
||||
int (*apic) (struct domain *d, int cmd);
|
||||
@@ -635,21 +632,6 @@ static inline int xsm_shadow_control (xsm_default_t def, struct domain *d, uint3
|
||||
return xsm_ops->shadow_control(d, op);
|
||||
}
|
||||
|
||||
static inline int xsm_hvm_set_pci_intx_level (xsm_default_t def, struct domain *d)
|
||||
{
|
||||
return xsm_ops->hvm_set_pci_intx_level(d);
|
||||
}
|
||||
|
||||
static inline int xsm_hvm_set_isa_irq_level (xsm_default_t def, struct domain *d)
|
||||
{
|
||||
return xsm_ops->hvm_set_isa_irq_level(d);
|
||||
}
|
||||
|
||||
static inline int xsm_hvm_set_pci_link_route (xsm_default_t def, struct domain *d)
|
||||
{
|
||||
return xsm_ops->hvm_set_pci_link_route(d);
|
||||
}
|
||||
|
||||
static inline int xsm_hvm_inject_msi (xsm_default_t def, struct domain *d)
|
||||
{
|
||||
return xsm_ops->hvm_inject_msi(d);
|
||||
|
||||
@@ -145,9 +145,6 @@ void __init xsm_fixup_ops (struct xsm_operations *ops)
|
||||
#ifdef CONFIG_X86
|
||||
set_to_dummy_if_null(ops, do_mca);
|
||||
set_to_dummy_if_null(ops, shadow_control);
|
||||
set_to_dummy_if_null(ops, hvm_set_pci_intx_level);
|
||||
set_to_dummy_if_null(ops, hvm_set_isa_irq_level);
|
||||
set_to_dummy_if_null(ops, hvm_set_pci_link_route);
|
||||
set_to_dummy_if_null(ops, hvm_inject_msi);
|
||||
set_to_dummy_if_null(ops, mem_sharing_op);
|
||||
set_to_dummy_if_null(ops, apic);
|
||||
|
||||
@@ -1502,21 +1502,6 @@ static int flask_ioport_mapping(struct domain *d, uint32_t start, uint32_t end,
|
||||
return flask_ioport_permission(d, start, end, access);
|
||||
}
|
||||
|
||||
static int flask_hvm_set_pci_intx_level(struct domain *d)
|
||||
{
|
||||
return current_has_perm(d, SECCLASS_HVM, HVM__PCILEVEL);
|
||||
}
|
||||
|
||||
static int flask_hvm_set_isa_irq_level(struct domain *d)
|
||||
{
|
||||
return current_has_perm(d, SECCLASS_HVM, HVM__IRQLEVEL);
|
||||
}
|
||||
|
||||
static int flask_hvm_set_pci_link_route(struct domain *d)
|
||||
{
|
||||
return current_has_perm(d, SECCLASS_HVM, HVM__PCIROUTE);
|
||||
}
|
||||
|
||||
static int flask_hvm_inject_msi(struct domain *d)
|
||||
{
|
||||
return current_has_perm(d, SECCLASS_HVM, HVM__SEND_IRQ);
|
||||
|
||||
@@ -259,12 +259,6 @@ class hvm
|
||||
setparam
|
||||
# HVMOP_get_param
|
||||
getparam
|
||||
# HVMOP_set_pci_intx_level (also needs hvmctl)
|
||||
pcilevel
|
||||
# HVMOP_set_isa_irq_level
|
||||
irqlevel
|
||||
# HVMOP_set_pci_link_route
|
||||
pciroute
|
||||
bind_irq
|
||||
# XEN_DOMCTL_pin_mem_cacheattr
|
||||
cacheattr
|
||||
|
||||