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x86/MCE: merge AMD quirks
merge mce_amd_quirks.c into mce_amd.c Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> Committed-by: Jan Beulich <jbeulich@suse.com>
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@@ -8,7 +8,6 @@ obj-y += mctelem.o
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obj-y += mce.o
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obj-y += mce-apei.o
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obj-y += mce_intel.o
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obj-y += mce_amd_quirks.o
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obj-y += non-fatal.o
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obj-y += util.o
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obj-y += vmce.o
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@@ -21,12 +21,24 @@
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#include <xen/types.h>
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#include <asm/msr.h>
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#include <asm/processor.h>
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#include "mce.h"
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#include "x86_mca.h"
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#include "mce_amd.h"
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#include "mcaction.h"
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#include "mce_quirks.h"
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#define ANY -1
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static const struct mce_quirkdata mce_amd_quirks[] = {
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{ 0xf /* cpu family */, ANY /* all models */, ANY /* all steppings */,
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MCEQUIRK_K8_GART },
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{ 0x10 /* cpu family */, ANY /* all models */, ANY /* all steppings */,
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MCEQUIRK_F10_GART },
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};
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/* Error Code Types */
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enum mc_ec_type {
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MC_EC_TLB_TYPE = 0x0010,
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@@ -99,6 +111,53 @@ mc_amd_addrcheck(uint64_t status, uint64_t misc, int addrtype)
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return 0;
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}
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/* MC quirks */
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enum mcequirk_amd_flags
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mcequirk_lookup_amd_quirkdata(struct cpuinfo_x86 *c)
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{
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int i;
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BUG_ON(c->x86_vendor != X86_VENDOR_AMD);
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for ( i = 0; i < ARRAY_SIZE(mce_amd_quirks); i++ )
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{
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if ( c->x86 != mce_amd_quirks[i].cpu_family )
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continue;
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if ( (mce_amd_quirks[i].cpu_model != ANY) &&
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(mce_amd_quirks[i].cpu_model != c->x86_model) )
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continue;
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if ( (mce_amd_quirks[i].cpu_stepping != ANY) &&
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(mce_amd_quirks[i].cpu_stepping != c->x86_mask) )
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continue;
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return mce_amd_quirks[i].quirk;
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}
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return 0;
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}
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int mcequirk_amd_apply(enum mcequirk_amd_flags flags)
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{
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uint64_t val;
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switch ( flags )
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{
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case MCEQUIRK_K8_GART:
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/*
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* Enable error reporting for all errors except for GART
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* TBL walk error reporting, which trips off incorrectly
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* with AGP GART & 3ware & Cerberus.
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*/
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wrmsrl(MSR_IA32_MCx_CTL(4), ~(1ULL << 10));
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wrmsrl(MSR_IA32_MCx_STATUS(4), 0ULL);
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break;
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case MCEQUIRK_F10_GART:
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if ( rdmsr_safe(MSR_AMD64_MCx_MASK(4), val) == 0 )
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wrmsr_safe(MSR_AMD64_MCx_MASK(4), val | (1 << 10));
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break;
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}
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return 0;
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}
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enum mcheck_type
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amd_mcheck_init(struct cpuinfo_x86 *ci)
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{
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@@ -1,76 +0,0 @@
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/*
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* MCA quirks for AMD CPUs
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* Copyright (c) 2009 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <asm-x86/msr.h>
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#include <asm-x86/processor.h>
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#include "mce_quirks.h"
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#define ANY -1
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static const struct mce_quirkdata mce_amd_quirks[] = {
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{ 0xf /* cpu family */, ANY /* all models */, ANY /* all steppings */,
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MCEQUIRK_K8_GART },
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{ 0x10 /* cpu family */, ANY /* all models */, ANY /* all steppings */,
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MCEQUIRK_F10_GART },
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};
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enum mcequirk_amd_flags
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mcequirk_lookup_amd_quirkdata(struct cpuinfo_x86 *c)
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{
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int i;
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BUG_ON(c->x86_vendor != X86_VENDOR_AMD);
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for (i = 0; i < ARRAY_SIZE(mce_amd_quirks); i++) {
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if (c->x86 != mce_amd_quirks[i].cpu_family)
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continue;
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if ( (mce_amd_quirks[i].cpu_model != ANY) &&
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(mce_amd_quirks[i].cpu_model != c->x86_model) )
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continue;
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if ( (mce_amd_quirks[i].cpu_stepping != ANY) &&
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(mce_amd_quirks[i].cpu_stepping != c->x86_mask) )
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continue;
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return mce_amd_quirks[i].quirk;
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}
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return 0;
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}
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int mcequirk_amd_apply(enum mcequirk_amd_flags flags)
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{
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u64 val;
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switch (flags) {
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case MCEQUIRK_K8_GART:
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/*
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* Enable error reporting for all errors except for GART
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* TBL walk error reporting, which trips off incorrectly
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* with AGP GART & 3ware & Cerberus.
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*/
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wrmsrl(MSR_IA32_MCx_CTL(4), ~(1ULL << 10));
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wrmsrl(MSR_IA32_MCx_STATUS(4), 0ULL);
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break;
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case MCEQUIRK_F10_GART:
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if (rdmsr_safe(MSR_AMD64_MCx_MASK(4), val) == 0)
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wrmsr_safe(MSR_AMD64_MCx_MASK(4), val | (1 << 10));
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break;
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}
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return 0;
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}
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