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x86: allow Meltdown band-aid to be disabled
First of all we don't need it on AMD systems. Additionally allow its use
to be controlled by command line option. For best backportability, this
intentionally doesn't use alternative instruction patching to achieve
the intended effect - while we likely want it, this will be later
follow-up.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
master commit: e871e80c38
master date: 2018-01-16 17:50:59 +0100
This commit is contained in:
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234f481337
commit
7cccd6f748
5 files changed
+34
-6
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@@ -1849,6 +1849,18 @@ In the case that x2apic is in use, this option switches between physical and
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clustered mode. The default, given no hint from the **FADT**, is cluster
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mode.
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### xpti
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> `= <boolean>`
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> Default: `false` on AMD hardware
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> Default: `true` everywhere else
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Override default selection of whether to isolate 64-bit PV guest page
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tables.
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** WARNING: Not yet a complete isolation implementation, but better than
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nothing. **
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### xsave
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> `= <boolean>`
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@@ -1505,10 +1505,13 @@ void paravirt_ctxt_switch_from(struct vcpu *v)
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void paravirt_ctxt_switch_to(struct vcpu *v)
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{
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root_pgentry_t *root_pgt = this_cpu(root_pgt);
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unsigned long cr4;
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this_cpu(root_pgt)[root_table_offset(PERDOMAIN_VIRT_START)] =
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l4e_from_page(v->domain->arch.perdomain_l3_pg, __PAGE_HYPERVISOR_RW);
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if ( root_pgt )
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root_pgt[root_table_offset(PERDOMAIN_VIRT_START)] =
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l4e_from_page(v->domain->arch.perdomain_l3_pg,
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__PAGE_HYPERVISOR_RW);
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cr4 = pv_guest_cr4_to_real_cr4(v);
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if ( unlikely(cr4 != read_cr4()) )
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+1
-1
@@ -3665,7 +3665,7 @@ long do_mmu_update(
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rc = mod_l4_entry(va, l4e_from_intpte(req.val), mfn,
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cmd == MMU_PT_UPDATE_PRESERVE_AD, v);
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if ( !rc )
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sync_guest = true;
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sync_guest = this_cpu(root_pgt);
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break;
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case PGT_writable_page:
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perfc_incr(writable_mmu_updates);
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+14
-3
@@ -328,7 +328,7 @@ void start_secondary(void *unused)
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spin_debug_disable();
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get_cpu_info()->xen_cr3 = 0;
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get_cpu_info()->pv_cr3 = __pa(this_cpu(root_pgt));
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get_cpu_info()->pv_cr3 = this_cpu(root_pgt) ? __pa(this_cpu(root_pgt)) : 0;
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load_system_tables();
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@@ -736,14 +736,20 @@ static int clone_mapping(const void *ptr, root_pgentry_t *rpt)
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return 0;
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}
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static __read_mostly int8_t opt_xpti = -1;
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boolean_param("xpti", opt_xpti);
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DEFINE_PER_CPU(root_pgentry_t *, root_pgt);
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static int setup_cpu_root_pgt(unsigned int cpu)
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{
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root_pgentry_t *rpt = alloc_xen_pagetable();
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root_pgentry_t *rpt;
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unsigned int off;
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int rc;
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if ( !opt_xpti )
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return 0;
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rpt = alloc_xen_pagetable();
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if ( !rpt )
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return -ENOMEM;
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@@ -987,10 +993,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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stack_base[0] = stack_start;
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if ( opt_xpti < 0 )
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opt_xpti = boot_cpu_data.x86_vendor != X86_VENDOR_AMD;
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rc = setup_cpu_root_pgt(0);
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if ( rc )
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panic("Error %d setting up PV root page table\n", rc);
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get_cpu_info()->pv_cr3 = __pa(per_cpu(root_pgt, 0));
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if ( per_cpu(root_pgt, 0) )
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get_cpu_info()->pv_cr3 = __pa(per_cpu(root_pgt, 0));
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set_nr_sockets();
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@@ -1062,6 +1072,7 @@ void __init smp_prepare_boot_cpu(void)
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#endif
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get_cpu_info()->xen_cr3 = 0;
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get_cpu_info()->pv_cr3 = 0;
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}
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static void
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@@ -46,6 +46,7 @@ restore_all_guest:
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movabs $DIRECTMAP_VIRT_START, %rcx
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mov %rdi, %rax
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and %rsi, %rdi
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jz .Lrag_keep_cr3
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and %r9, %rsi
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add %rcx, %rdi
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add %rcx, %rsi
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@@ -62,6 +63,7 @@ restore_all_guest:
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rep movsq
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mov %r9, STACK_CPUINFO_FIELD(xen_cr3)(%rdx)
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write_cr3 rax, rdi, rsi
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.Lrag_keep_cr3:
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RESTORE_ALL
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testw $TRAP_syscall,4(%rsp)
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