mirror of
https://github.com/xen-project/xen.git
synced 2026-10-28 02:01:24 +01:00
x86/cpu-policy: Infrastructure for CPUID leaf 0x80000021.ecx
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit 6e3c3cea09)
This commit is contained in:
1 parent
b6266b20f1
commit
82c302a62d
7 files changed
+19
-3
No files matched your search
@@ -342,6 +342,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* str)
|
||||
CPUID_ENTRY(0x00000007, 1, CPUID_REG_EDX),
|
||||
MSR_ENTRY(0x10a, CPUID_REG_EAX),
|
||||
MSR_ENTRY(0x10a, CPUID_REG_EDX),
|
||||
CPUID_ENTRY(0x80000021, NA, CPUID_REG_ECX),
|
||||
#undef MSR_ENTRY
|
||||
#undef CPUID_ENTRY
|
||||
};
|
||||
|
||||
@@ -254,6 +254,10 @@ static const char *const str_m10Al[64] =
|
||||
[62] = "its-no",
|
||||
};
|
||||
|
||||
static const char *const str_e21c[32] =
|
||||
{
|
||||
};
|
||||
|
||||
static const struct {
|
||||
const char *name;
|
||||
const char *abbr;
|
||||
@@ -278,6 +282,7 @@ static const struct {
|
||||
{ "CPUID 0x00000007:1.edx", "7d1", str_7d1 },
|
||||
{ "MSR_ARCH_CAPS.lo", "m10Al", str_m10Al },
|
||||
{ "MSR_ARCH_CAPS.hi", "m10Ah", str_m10Al + 32 },
|
||||
{ "CPUID 0x80000021.ecx", "e21c", str_e21c },
|
||||
};
|
||||
|
||||
#define COL_ALIGN "24"
|
||||
|
||||
@@ -342,7 +342,6 @@ static void recalculate_misc(struct cpu_policy *p)
|
||||
p->extd.raw[0x1f] = EMPTY_LEAF; /* SEV */
|
||||
p->extd.raw[0x20] = EMPTY_LEAF; /* Platform QoS */
|
||||
p->extd.raw[0x21].b = 0;
|
||||
p->extd.raw[0x21].c = 0;
|
||||
p->extd.raw[0x21].d = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -479,7 +479,9 @@ static void generic_identify(struct cpuinfo_x86 *c)
|
||||
if (c->extended_cpuid_level >= 0x80000008)
|
||||
c->x86_capability[FEATURESET_e8b] = cpuid_ebx(0x80000008);
|
||||
if (c->extended_cpuid_level >= 0x80000021)
|
||||
c->x86_capability[FEATURESET_e21a] = cpuid_eax(0x80000021);
|
||||
cpuid(0x80000021,
|
||||
&c->x86_capability[FEATURESET_e21a], &tmp,
|
||||
&c->x86_capability[FEATURESET_e21c], &tmp);
|
||||
|
||||
/* Intel-defined flags: level 0x00000007 */
|
||||
if (c->cpuid_level >= 7) {
|
||||
|
||||
@@ -348,6 +348,8 @@ XEN_CPUFEATURE(RFDS_CLEAR, 16*32+28) /*!A Register File(s) cleared by VE
|
||||
XEN_CPUFEATURE(PB_OPT_CTRL, 16*32+32) /* MSR_PB_OPT_CTRL.IBPB_ALT */
|
||||
XEN_CPUFEATURE(ITS_NO, 16*32+62) /*!A No Indirect Target Selection */
|
||||
|
||||
/* AMD-defined CPU features, CPUID level 0x80000021.ecx, word 18 */
|
||||
|
||||
#endif /* XEN_CPUFEATURE */
|
||||
|
||||
/* Clean up from a default include. Close the enum (for C). */
|
||||
|
||||
@@ -22,6 +22,7 @@
|
||||
#define FEATURESET_7d1 15 /* 0x00000007:1.edx */
|
||||
#define FEATURESET_m10Al 16 /* 0x0000010a.eax */
|
||||
#define FEATURESET_m10Ah 17 /* 0x0000010a.edx */
|
||||
#define FEATURESET_e21c 18 /* 0x80000021.ecx */
|
||||
|
||||
struct cpuid_leaf
|
||||
{
|
||||
@@ -327,7 +328,11 @@ struct cpu_policy
|
||||
uint16_t ucode_size; /* Units of 16 bytes */
|
||||
uint8_t rap_size; /* Units of 8 entries */
|
||||
uint8_t :8;
|
||||
uint32_t /* c */:32, /* d */:32;
|
||||
union {
|
||||
uint32_t e21c;
|
||||
struct { DECL_BITFIELD(e21c); };
|
||||
};
|
||||
uint32_t /* d */:32;
|
||||
};
|
||||
} extd;
|
||||
|
||||
|
||||
@@ -81,6 +81,7 @@ void x86_cpu_policy_to_featureset(
|
||||
fs[FEATURESET_7d1] = p->feat._7d1;
|
||||
fs[FEATURESET_m10Al] = p->arch_caps.lo;
|
||||
fs[FEATURESET_m10Ah] = p->arch_caps.hi;
|
||||
fs[FEATURESET_e21c] = p->extd.e21c;
|
||||
}
|
||||
|
||||
void x86_cpu_featureset_to_policy(
|
||||
@@ -104,6 +105,7 @@ void x86_cpu_featureset_to_policy(
|
||||
p->feat._7d1 = fs[FEATURESET_7d1];
|
||||
p->arch_caps.lo = fs[FEATURESET_m10Al];
|
||||
p->arch_caps.hi = fs[FEATURESET_m10Ah];
|
||||
p->extd.e21c = fs[FEATURESET_e21c];
|
||||
}
|
||||
|
||||
void x86_cpu_policy_recalc_synth(struct cpu_policy *p)
|
||||
|
||||