xen/arm: Extend SCIF early prink code to handle other interfaces

Extend early prink code to be able to handle other SCIF(X)
compatible interfaces as well. These interfaces have lot in common,
but mostly differ in offsets and bits for some registers.

Introduce "EARLY_PRINTK_VERSION" config option to choose which
interface version should be used (to properly apply register offsets).

Please note, nothing has been technically changed for Renesas "Lager"
and other supported boards (SCIF).

The "EARLY_PRINTK_VERSION" option for that board should be empty:
CONFIG_EARLY_PRINTK=scif,0xe6e60000

Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Acked-by: Julien Grall <julien.grall@arm.com>
This commit is contained in:
Oleksandr Tyshchenko authored and Julien Grall committed 2019-05-16 16:43:49 +01:00
1 parent 9dc8043ba1
commit 89a9701630
3 files changed
+23 -6

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+5
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@@ -27,6 +27,11 @@ CONFIG_EARLY_PRINTK=<INC>,<BASE_ADDRESS>,<OTHER_OPTIONS>
If <BAUD_RATE> is not given then the code will not try to
initialize the UART, so that bootloader or firmware settings can
be used for maximum compatibility.
- scif,<BASE_ADDRESS>,<VERSION>
- SCIF<VERSION> is, optionally, the interface version of the UART.
If <VERSION> is not given then the default interface version (SCIF)
will be used.
- For all other uarts there are no additional options.
As a convenience it is also possible to select from a list of
+7
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@@ -68,6 +68,13 @@ EARLY_PRINTK_INIT_UART := y
EARLY_PRINTK_BAUD := $(word 3,$(EARLY_PRINTK_CFG))
endif
endif
ifeq ($(EARLY_PRINTK_INC),scif)
ifneq ($(word 3,$(EARLY_PRINTK_CFG)),)
CFLAGS-y += -DEARLY_PRINTK_VERSION_$(word 3,$(EARLY_PRINTK_CFG))
else
CFLAGS-y += -DEARLY_PRINTK_VERSION_NONE
endif
endif
ifneq ($(EARLY_PRINTK_INC),)
EARLY_PRINTK := y
+11 -6
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@@ -19,28 +19,33 @@
#include <asm/scif-uart.h>
#ifdef EARLY_PRINTK_VERSION_NONE
#define STATUS_REG SCIF_SCFSR
#define TX_FIFO_REG SCIF_SCFTDR
#endif
/*
* SCIF UART wait UART to be ready to transmit
* Wait UART to be ready to transmit
* rb: register which contains the UART base address
* rc: scratch register
*/
.macro early_uart_ready rb rc
1:
ldrh \rc, [\rb, #SCIF_SCFSR] /* <- SCFSR (status register) */
ldrh \rc, [\rb, #STATUS_REG] /* Read status register */
tst \rc, #SCFSR_TDFE /* Check TDFE bit */
beq 1b /* Wait for the UART to be ready */
.endm
/*
* SCIF UART transmit character
* UART transmit character
* rb: register which contains the UART base address
* rt: register which contains the character to transmit
*/
.macro early_uart_transmit rb rt
strb \rt, [\rb, #SCIF_SCFTDR] /* -> SCFTDR (data register) */
ldrh \rt, [\rb, #SCIF_SCFSR] /* <- SCFSR (status register) */
strb \rt, [\rb, #TX_FIFO_REG] /* Write data register */
ldrh \rt, [\rb, #STATUS_REG] /* Read status register */
and \rt, \rt, #(~(SCFSR_TEND | SCFSR_TDFE)) /* Clear TEND and TDFE bits */
strh \rt, [\rb, #SCIF_SCFSR] /* -> SCFSR (status register) */
strh \rt, [\rb, #STATUS_REG] /* Write status register */
.endm
/*
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